最近幾年新出的一些MCU，有很多都具有ISP（In System Programming：在系統(tǒng)編程）特性，利用這一特性可以在無需通用編程器的情況下，方便地對芯片執(zhí)行各種操作（擦除，讀取，編程等操作）；如果進(jìn)一步配上一些軟件（如Keil的ISD51），即可實(shí)現(xiàn)一些簡單的在線調(diào)試功能（當(dāng)然要損失一個(gè)串口）。一些開發(fā)者，也經(jīng)常在自己的系統(tǒng)上預(yù)留ISP接口，以供日后升級之用。可以說ISP的廣泛應(yīng)用，標(biāo)志著單片機(jī)開發(fā)技術(shù)的進(jìn)步。 但是ISP功能的實(shí)現(xiàn)也有一定的限制，如需要一個(gè)串口，需要一定的駐留代碼空間，或者需要一定外部電路。于是有一些經(jīng)驗(yàn)不足的朋友，在實(shí)現(xiàn)ISP功能的時(shí)候便經(jīng)常出問題，要么是外部電路的問題，要么是串口的問題。比如：為什么軟件老是報(bào)“通信出錯(cuò)”；為什么我的系統(tǒng)，第一次可以進(jìn)ISP，第二次就不行了；為什么我在Win98下無法進(jìn)入ISP，換了WinXP就可以了。這些問題總是出現(xiàn)于一些細(xì)微的地方，一些被人忽略的地方，如果你沒有充足的時(shí)間，充足的精力，充足的耐心去尋找這些根源；如果你有一臺(tái)CP900編程器（當(dāng)然其他的某些編程器也可以）；如果你不想在那塊可憐的小電路板上，再擠進(jìn)一堆器件；如果你不想在購料單上再增加一批Max232，或者一批xx型電容,yy型電阻,那么請使用ICP吧（InCircuit Programming：在電路編程）。
上傳時(shí)間： 2013-11-19
上傳用戶：pol123
The MSP-FET430U14 is a powerful flash emulation tool to quickly begin application development on the MSP430 MCU. It includes USB debugging interface used to program and debug the MSP430 in-system through the JTAG interface or the pin saving Spy Bi-Wire (2-wire JTAG) protocol. The flash memory can be erased and programmed in seconds with only a few keystrokes, and since the MSP430 flash is ultra-low power, no external power supply is required. The debugging tool interfaces the MSP430 to the included integrated software environment and includes code to start your design immediately. The MSP-FET430UIF development tools supports development with all MSP430 flash devices
上傳時(shí)間： 2013-10-28
上傳用戶：13691535575
CCAVR軟件有ISP功能，能過調(diào)用STK500完成的，只要設(shè)置好參數(shù)，在ICCAVR中就可以給芯片編程了，還可以讓程序一編譯完就自動(dòng)下載到芯片中，相當(dāng)方便。在Tools->environment options->ISP里設(shè)定STK500.exe的路徑。— 用于調(diào)用STK500程序。在Tools->In system programming 里Programmer Interface中選中STK500。— 選擇STK500下載方式。在Tools->In system programming 里把Auto Program After Compile 的小勾選上。— 編譯后自動(dòng)編程。在Tools->In system programming 中還有一些設(shè)置項(xiàng)，大家可以根據(jù)需要進(jìn)行相關(guān)設(shè)置。下面的圖片是操作過程。
標(biāo)簽： ICCAVR 自動(dòng) 下載程序
上傳時(shí)間： 2013-11-17
上傳用戶：joseph
51單片機(jī)實(shí)訓(xùn)指南:一、 實(shí)習(xí)課題基于單片機(jī)最小系統(tǒng)的頻率計(jì)設(shè)計(jì)二、 實(shí)習(xí)內(nèi)容單片機(jī)最小系統(tǒng)電路原理設(shè)計(jì)分析與講解，PCB設(shè)計(jì)分析與講解，電路板焊接培訓(xùn)與實(shí)際操作，程序設(shè)計(jì)、調(diào)試分析與講解，程序調(diào)試實(shí)際操作。三、硬件資源※ 89S51單片機(jī)；※ 6位共陽極數(shù)碼管；※ 段碼驅(qū)動(dòng)器74HC573，位選譯碼器74HC138；※ 4路獨(dú)立式按鍵；※ 外部晶振電路；※ ISP下載接口（In system program,在系統(tǒng)編程）；※ DC+5V電源試配器（選配）；※ ISP下載線（選配）；※ 單片機(jī)實(shí)訓(xùn)模塊（頻率計(jì)分頻預(yù)處理電路）。四、電路原理分析與設(shè)計(jì)P1為外部電源輸入座（DC+5V），S8為電源最小系統(tǒng)的電源開關(guān)，E1和C3為電源濾波，去耦電容。D1為系統(tǒng)電源指示燈。J2為ISP下載接口，S7系統(tǒng)復(fù)位按鍵。CRY1，C1，C2為外部時(shí)針電路。IC1為89S51（DIP-40），左上角為第一腳。PRE1，PRE2。為上拉排阻（阻值4.7k—10k）。J5，J9，J6，J10分別對應(yīng)單片機(jī)的P0，P1，P2，P3口。便于二次開發(fā)。6路共陽極數(shù)碼管動(dòng)態(tài)顯示電路，P0口通過74HC573（起驅(qū)動(dòng)和隔離作用，讓電流通過74CH573流入公共地），來控制數(shù)碼管的8路段碼，P20-P22通過74HC138譯碼器（使用其中的6路）控制數(shù)碼管的公共端（中間還有三極管做驅(qū)動(dòng)器）。這樣設(shè)計(jì)的理由：為了保證該單片機(jī)最小系統(tǒng)的二次開發(fā)的資源充足和合理性。
標(biāo)簽： 51單片機(jī)
上傳時(shí)間： 2013-10-14
上傳用戶：ryb
The μPSD32xx family, from ST, consists of Flash programmable system devices with a 8032 MicrocontrollerCore. Of these, the μPSD3234A and μPSD3254A are notable for having a complete implementationof the USB hardware directly on the chip, complying with the Universal Serial Bus Specification, Revision1.1.This application note describes a demonstration program that has been written for the DK3200 hardwaredemonstration kit (incorporating a μPSD3234A device). It gives the user an idea of how simple it is to workwith the device, using the HID class as a ready-made device driver for the USB connection.IN-APPLICATION-PROGRAMMING (IAP) AND IN-SYSTEM-PROGRAMMING (ISP)Since the μPSD contains two independent Flash memory arrays, the Micro Controller Unit (MCU) can executecode from one memory while erasing and programming the other. Product firmware updates in thefield can be reliably performed over any communication channel (such as CAN, Ethernet, UART, J1850)using this unique architecture. For In-Application-Programming (IAP), all code is updated through theMCU. The main advantage for the user is that the firmware can be updated remotely. The target applicationruns and takes care on its own program code and data memory.IAP is not the only method to program the firmware in μPSD devices. They can also be programmed usingIn-System-Programming (ISP). A IEEE1149.1-compliant JTAG interface is included on the μPSD. Withthis, the entire device can be rapidly programmed while soldered to the circuit board (Main Flash memory,Secondary Boot Flash memory, the PLD, and all configuration areas). This requires no MCU participation.The MCU is completely bypassed. So, the μPSD can be programmed or reprogrammed any time, anywhere, even when completely uncommitted.Both methods take place with the device in its normal hardware environment, soldered to a printed circuitboard. The IAP method cannot be used without previous use of ISP, because IAP utilizes a small amountof resident code to receive the service commands, and to perform the desired operations.
標(biāo)簽： Demonstration 3200 USB for
上傳時(shí)間： 2014-02-27
上傳用戶：zhangzhenyu
The AT89C52 is a low-power, high-performance CMOS 8-bit microcomputer with 8Kbytes of Flash programmable and erasable read only memory (PEROM). The deviceis manufactured using Atmel’s high-density nonvolatile memory technology and iscompatible with the industry-standard 80C51 and 80C52 instruction set and pinout.The on-chip Flash allows the program memory to be reprogrammed in-system or by aconventional nonvolatile memory programmer. By combining a versatile 8-bit CPUwith Flash on a monolithic chip, the Atmel AT89C52 is a powerful microcomputerwhich provides a highly-flexible and cost-effective solution to many embedded controlapplications.
上傳時(shí)間： 2013-11-10
上傳用戶：1427796291
什么是JTAG 到底什么是JTAG呢？ JTAG(Joint Test Action Group)聯(lián)合測試行動(dòng)小組)是一種國際標(biāo)準(zhǔn)測試協(xié)議（IEEE 1149.1兼容），主要用于芯片內(nèi)部測試。現(xiàn)在多數(shù)的高級器件都支持JTAG協(xié)議，如DSP、FPGA器件等。標(biāo)準(zhǔn)的JTAG接口是4線：TMS、 TCK、TDI、TDO，分別為模式選擇、時(shí)鐘、數(shù)據(jù)輸入和數(shù)據(jù)輸出線。 JTAG最初是用來對芯片進(jìn)行測試的，基本原理是在器件內(nèi)部定義一個(gè)TAP（Test Access Port�測試訪問口）通過專用的JTAG測試工具對進(jìn)行內(nèi)部節(jié)點(diǎn)進(jìn)行測試。JTAG測試允許多個(gè)器件通過JTAG接口串聯(lián)在一起，形成一個(gè)JTAG鏈，能實(shí)現(xiàn)對各個(gè)器件分別測試。現(xiàn)在，JTAG接口還常用于實(shí)現(xiàn)ISP（In-System rogrammable�在線編程），對FLASH等器件進(jìn)行編程。 JTAG編程方式是在線編程，傳統(tǒng)生產(chǎn)流程中先對芯片進(jìn)行預(yù)編程現(xiàn)再裝到板上因此而改變，簡化的流程為先固定器件到電路板上，再用JTAG編程，從而大大加快工程進(jìn)度。JTAG接口可對PSD芯片內(nèi)部的所有部件進(jìn)行編程 JTAG的一些說明 通常所說的JTAG大致分兩類，一類用于測試芯片的電氣特性，檢測芯片是否有問題；一類用于Debug；一般支持JTAG的CPU內(nèi)都包含了這兩個(gè)模塊。 一個(gè)含有JTAG Debug接口模塊的CPU，只要時(shí)鐘正常，就可以通過JTAG接口訪問CPU的內(nèi)部寄存器和掛在CPU總線上的設(shè)備，如FLASH，RAM，SOC（比如4510B，44Box，AT91M系列）內(nèi)置模塊的寄存器，象UART，Timers，GPIO等等的寄存器。 上面說的只是JTAG接口所具備的能力，要使用這些功能，還需要軟件的配合，具體實(shí)現(xiàn)的功能則由具體的軟件決定。 例如下載程序到RAM功能。了解SOC的都知道，要使用外接的RAM，需要參照SOC DataSheet的寄存器說明，設(shè)置RAM的基地址，總線寬度，訪問速度等等。有的SOC則還需要Remap，才能正常工作。運(yùn)行Firmware時(shí)，這些設(shè)置由Firmware的初始化程序完成。但如果使用JTAG接口，相關(guān)的寄存器可能還處在上電值，甚至?xí)r錯(cuò)誤值，RAM不能正常工作，所以下載必然要失敗。要正常使用，先要想辦法設(shè)置RAM。在ADW中，可以在Console窗口通過Let 命令設(shè)置，在AXD中可以在Console窗口通過Set命令設(shè)置。
上傳時(shí)間： 2013-10-23
上傳用戶：aeiouetla
This application note explains the XC9500™/XL/XV Boundary Scan interface anddemonstrates the software available for programming and testing XC9500/XL/XV CPLDs. Anappendix summarizes the iMPACT software operations and provides an overview of theadditional operations supported by XC9500/XL/XV CPLDs for in-system programming.
上傳時(shí)間： 2013-11-15
上傳用戶：fengweihao158@163.com
This application note contains a reference design consisting of HDL IP and Xilinx AdvancedConfiguration Environment (ACE) software utilities that give designers great flexibility increating in-system programming (ISP) solutions. In-system programming support allowsdesigners to revise existing designs, package the new bitstream programming files with theprovided software utilities, and update the remote system through the JTAG interface using theEmbedded JTAG ACE Player.
上傳時(shí)間： 2013-11-14
上傳用戶：JIMMYCB001
Prakash Rashinkar has over 15 years experience in system design and verificationof embedded systems for communication satellites, launch vehicles and spacecraftground systems, high-performance computing, switching, multimedia, and wirelessapplications. Prakash graduated with an MSEE from Regional Engineering College,Warangal, in India. He lead the team that was responsible for delivering themethodologies for SOC verification at Cadence Design Systems. Prakash is anactive member of the VSIA Functional Verification DWG. He is currently Architectin the Vertical Markets and Design Environments Group at Cadence.
上傳時(shí)間： 2014-01-24
上傳用戶：xinhaoshan2016
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