SAP Business One Documentation. Includes Installation Manual, System Guide, Security Guide and others.
標(biāo)簽： Guide Documentation Installation Business
上傳時(shí)間： 2013-12-20
上傳用戶：xhz1993
本程序?yàn)閷IDSP的OUT文件 轉(zhuǎn)換為 KEIL 的hex 文件格式，程序經(jīng)過(guò)測(cè)試 可以直接實(shí)用，方便用戶的使用
上傳時(shí)間： 2016-09-29
上傳用戶：baiom
Get more out of your legacy systems: more performance, functionality, reliability, and manageability Is your code easy to change? Can you get nearly instantaneous feedback when you do change it? Do you understand it? If the answer to any of these questions is no, you have legacy code, and it is draining time and money away from your development efforts.
標(biāo)簽： more functionality manageability performance
上傳時(shí)間： 2013-12-13
上傳用戶：semi1981
雙CPU BOOTLOADER 綜合實(shí)驗(yàn),不用燒寫工具 將.out文件轉(zhuǎn)換成.hex文件燒寫到flash里
標(biāo)簽： BOOTLOADER flash CPU out
上傳時(shí)間： 2014-01-01
上傳用戶：llandlu
At can be given its arguments in a file. You can comment out lines by preceding them with either # or - characters. This is an easy way to temporarily disable some commands. The CONTINUE-command is most useful at the end of the file. When this command is read, the file is started again from the beginning. You can use it situations where the machine is not shut down for the night and you want to run some commands every day.
標(biāo)簽： can arguments preceding comment
上傳時(shí)間： 2013-12-11
上傳用戶：comua
this is a good one for linux network protocol
標(biāo)簽： protocol network linux this
上傳時(shí)間： 2016-10-17
上傳用戶：sxdtlqqjl
CRC碼產(chǎn)生器與校驗(yàn)器程序 Features ： Executes in one clock cycle per data word Any polynomial from 4 to 32 bits Any data width from 1 to 256 bits Any initialization value Synchronous or asynchronous reset
標(biāo)簽： polynomial Features Executes clock
上傳時(shí)間： 2013-12-18
上傳用戶：Ants
Shape registration by shape context: algorithm implemented by matlab and the paper. One of the best point matching algorithm after 2000.
標(biāo)簽： registration implemented algorithm the
上傳時(shí)間： 2016-10-20
上傳用戶：1583060504
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
標(biāo)簽： SHIFTER name module Input
上傳時(shí)間： 2013-12-13
上傳用戶：himbly
Top module name : SHIFTER (File name : SHIFTER.v) 2. Input pins: SHIFT [3:0], IN [15:0], SIGN, RIGHT. 3. Output pins: OUT [15:0]. 4. Input signals generated from test pattern are latched in one cycle and are synchronized at clock rising edge. 5. The SHIFT signal describes the shift number. The shift range is 0 to 15. 6. When the signal RIGHT is high, it shifts input data to right. On the other hand, it shifts input data to left. 7. When the signal SIGN is high, the input data is a signed number and it shifts with sign extension. However, the input data is an unsigned number if the signal SIGN is low. 8. You can only use following gates in Table I and need to include the delay information (Tplh, Tphl) in your design.
標(biāo)簽： SHIFTER name module Input
上傳時(shí)間： 2014-01-20
上傳用戶：三人用菜
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