MCPU is a minimal cpu aimed to fit into a 32 Macrocell CPLD - one of the smallest available programmable logic devices. While this CPU is not powerful enough for real world applications it has proven itself as a valuable educational tool. The source code is just a single page and easily understood. Both VHDL and Verilog versions are supplied. The package comes with assembler, emulator and extensive documentation.
標(biāo)簽： Macrocell available smallest programm
上傳時(shí)間： 2017-03-11
上傳用戶(hù)：mikesering
Although some FX1-based devices may use the FX1鈥檚 CPU to process USB data directly (Port I/O Mode), most applica- tions use the FX1 simply as a conduit between the USB and external data-processing logic (e.g., an ASIC or DSP, or the IDE controller on a hard disk drive).
標(biāo)簽： Although directly devices process
上傳時(shí)間： 2014-01-08
上傳用戶(hù)：2467478207
本課程學(xué)習(xí)完畢后學(xué)員可以熟練掌握以下內(nèi)容 ·Struts框架 講解MVC標(biāo)準(zhǔn)實(shí)現(xiàn)框架Struts的基本配置及基本使用，講解了Struts的基本工作原理，常用標(biāo)簽(HTML、logic、 BEAN)、各種主要Action(Action、ForwardAction、DispatchAction)、Struts驗(yàn)證框架、Struts國(guó)際化、Struts解 決重復(fù)提交及文件上傳操作等。 ·Hibernate框架 講解Hibernate框架的基本ORMapping實(shí)現(xiàn)及Hibernate主要的配置操作，并講解了Hibernate數(shù)據(jù)檢索操作、實(shí)體映射 技術(shù)、復(fù)合主鍵、實(shí)體層設(shè)計(jì)、容器映射技術(shù)及復(fù)雜的數(shù)據(jù)關(guān)聯(lián)技術(shù)，并結(jié)合之前講解的struts框架與DAO設(shè)計(jì)模式和 數(shù)據(jù)關(guān)聯(lián)技術(shù)一起完成了三個(gè)大的項(xiàng)目開(kāi)發(fā)練習(xí)，以幫助讀者鞏固Hibernate及Struts的使用。 ·Spring框架 結(jié)合Java基礎(chǔ)中的對(duì)象產(chǎn)生介紹了Spring產(chǎn)生的主要目的，并通過(guò)代碼詳細(xì)講解了Spring中各主要配置文件的作用， 并講解了Spring中的Ioc、AOP技術(shù)和Jdbc模板技術(shù)，最后講解了如何將Spring與Struts、Hibernate三個(gè)框架聯(lián)合進(jìn) 行開(kāi)發(fā)，在最后的案例講解中，重點(diǎn)講解了SSH框架聯(lián)合開(kāi)發(fā)技術(shù)。
標(biāo)簽： Struts MVC 標(biāo)準(zhǔn)
上傳時(shí)間： 2013-11-27
上傳用戶(hù)：3到15
松下TFT顯示屏的驅(qū)動(dòng)原理，采用MST720方案，是TFT屏開(kāi)發(fā)人員的必要資料。文檔為POWER logic
標(biāo)簽： TFT 松下 顯示屏 驅(qū)動(dòng)原理
上傳時(shí)間： 2013-12-23
上傳用戶(hù)：luopoguixiong
full testbench design including random number generator, the tcc encoder, the tcc decoder and some control logic.
標(biāo)簽： testbench including generator tcc
上傳時(shí)間： 2013-12-29
上傳用戶(hù)：mpquest
This manual describes SAMSUNG s S3C2410A 16/32-bit RISC microprocessor. This product is designed to provide hand-held devices and general applications with cost-effective, low-power, and high-performance micro-controller solution in small die size. To reduce total system cost, the S3C2410A includes the following components separate 16KB Instruction and 16KB Data Cache, MMU to handle virtual memory management, LCD Controller (STN & TFT), NAND Flash Boot Loader, System Manager (chip select logic and SDRAM Controller), 3-ch UART, 4-ch DMA, 4-ch Timers with PWM, I/O Ports, RTC, 8-ch 10-bit ADC and Touch Screen Interface, IIC-BUS Interface, IIS-BUS Interface, USB Host, USB Device, SD Host & Multi-Media Card Interface, 2-ch SPI and PLL for clock generation.
標(biāo)簽： This microprocessor describes S3C2410A
上傳時(shí)間： 2013-11-30
上傳用戶(hù)：GavinNeko
this is develop in java. you can see how to print a kind of star. its very usefull to learn a java programming. how the logic can be write to code in java
標(biāo)簽： java develop usefull print
上傳時(shí)間： 2017-07-25
上傳用戶(hù)：changeboy
RS_latch using vhdl, When using static gates as building blocks, the most fundamental latch is the simple SR latch, where S and R stand for set and reset. It can be constructed from a pair of cross-coupled NOR (Not OR) logic gates. The stored bit is present on the output marked Q. Normally, in storage mode, the S and R inputs are both low, and feedback maintains the Q and Q outputs in a constant state, with Q the complement of Q. If S (Set) is pulsed high while R is held low, then the Q output is forced high, and stays high when S returns to low similarly, if R (Reset) is pulsed high while S is held low, then the Q output is forced low, and stays low when R returns to low.
標(biāo)簽： using fundamental the RS_latch
上傳時(shí)間： 2017-07-30
上傳用戶(hù)：努力努力再努力
An introductory course on programming PIC microcontrollers. The reader should have some knowledge of digital logic.
標(biāo)簽： microcontrollers introductory programming knowledge
上傳時(shí)間： 2017-08-13
上傳用戶(hù)：gxrui1991
A programmable digital signal processor (PDSP) is a special-purpose microprocessor with specialized architecture and instruction set for implementing DSP algorithms. Typical architectural features include multiple memory partitions (onchip, off-chip, data memory, program memory, etc.), multiple (generally pipelined) arithmetic and logic units (ALUs), nonuniform register sets, and extensive hardware numeric support [1,2]. Single-chip PDSPs have become increasingly popular for real-time DSP applications [3,4].
標(biāo)簽： special-purpose microprocessor programmable specialized
上傳時(shí)間： 2017-08-13
上傳用戶(hù)：腳趾頭
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