The maIn objective of this book is to present all the relevant informationrequired for RF and micro-wave power amplifier design includingwell-known and novel theoretical approaches and practical design techniquesas well as to suggest optimum design approaches effectively combininganalytical calculations and computer-aided design. This bookcan also be very useful for lecturing to promote the analytical way ofthinking with practical verification by making a bridge between theoryand practice of RF and microwave engineering. As it often happens, anew result is the well-forgotten old one. Therefore, the demonstrationof not only new results based on new technologies or circuit schematicsis given, but some sufficiently old ideas or approaches are also introduced,that could be very useful in modern practice or could contributeto appearance of new ideas or schematic techniques.
標簽： Amplifier Microwave Design Power
上傳時間： 2013-12-22
上傳用戶：vodssv
闡述了軌道交通列車定位技術。介紹了在軌道交通系統(tǒng)中列車定位技術的功能，國內外軌道交通中主要采用的列車定位方法，重點論述了幾種主要定位技術，并從定位精度、閉塞制式、維護投資成本、抗干擾等方面進行分析比較。提出目前軌道交通定位技術應綜合運用，取長補短，多種方法相互融合，才能滿足軌道交通中對安全可靠性的要求。 Abstract: Rail train positioning technology is described. The paper introduces the funetions of the train positioning technology in the rail transit system， the maIn methods of train positioning do mestic and international rail， and focuses on several key methods， analyzes and compares from the positioning accuracy， block system, maIntenance and investment cost， interference and so on， suggested that the current rail positioning technology should be integrated use of positioning method of meriging， learn from each other， to meet the reliability requirements of rail safety.
上傳時間： 2013-11-25
上傳用戶：franktu
ORCAD在使用的時候總會出現(xiàn)這樣或那樣的問題…但下這個問題比較奇怪…在ORCAD中無法輸出網表…彈出下面的錯誤….這種問題很是奇怪…Netlist Format: tango.dllDesign Name: D:\EDA_PROJECT\PROTEL99SE\YK\SV3200\maIn.DSNERROR [NET0021] Cannot get part.[FMT0024] Ref-des not found. Possible Logical/Physical annotation conflict.[FMT0018] Errors processing intermediate file找了一天沒找到問題…終于在花了N多時間后發(fā)現(xiàn)問題所在…其實這個問題就是不要使用ORCAD PSPICE 庫里面的元件來畫電路圖…實際中我是用了PSPICE里面和自己制作的二種電阻和電容混合在一起…就會出現(xiàn)這種問題…
上傳時間： 2013-11-21
上傳用戶：zaocan888
C語言函數大全，已包含絕大部分的函數。每個函數包含函數名，功能，用法，舉例，內容詳盡。希望對大家有所幫助~~ 函數名: abort 功 能: 異常終止一個進程 用 法: void abort(void); 程序例: #include #include int maIn(void) { printf("Calling abort()\n"); abort(); return 0; /* This is never reached */ } 函數名: abs 功 能: 求整數的絕對值 用 法: int abs(int i); 程序例: #include #include int maIn(void) { int number = -1234; printf("number: %d absolute value: %d\n", number, abs(number)); return 0; }
上傳時間： 2013-12-06
上傳用戶：feifei0302
本程序主要表現(xiàn)了C++多文件系統(tǒng)的MCU構建方法,任何支持C++的MCU/ARM/DSP都可用 此法構建。 特別要注意變量的重復定義問題: 最好每個C/CPP文件包含與自己同名的H頭文件,在其H頭文件中再包含一個中間 起橋梁作用的H頭文件,我一般喜歡maIn.h 變量或函數要在C/CPP中定義，絕對不要在H頭文件中定義! 但一定要在H頭文件中用extern加變量或函數聲明。
上傳時間： 2013-10-12
上傳用戶：dingdingcandy
#include <reg51.h>#include <maIn.h>#include <interrupt.h> cs5460a應用電路(含源程序)bit code table_odd_even_bit[16]={0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0}; extern uchar rs485_timeout,pointer_buf485;extern uchar rs485_buf[MAX_485_LEN];extern uchar idata spi_buf[MAX_SPI_LEN];extern uchar pointer_send,send_len; extern uchar count_1s;//extern uint count_2min;extern uint count_10s;extern uchar oper_len,send_offset,chk_sum,send_i;extern bit flag_send_data,flag_level,flag_drdy,flag_data_ok;
上傳時間： 2014-01-24
上傳用戶：heart_2007
//------------------------------------------------------------------------------------//此程序為ADC轉換程序，可以選擇向ADC0BUSY寫1或用定時器0,1,2,3作為ADC的啟動信號。////------------------------------------------------------------------------------------//頭文件定義//------------------------------------------------------------------------------------//#include <c8051f330.h> #include <stdio.h> //-----------------------------------------------------------------------------// 定義16位特殊功能寄存器//----------------------------------------------------------------------------- sfr16 ADC0 = 0xbd; sfr16 TMR0RL = 0xca; sfr16 TMR1RL = 0xca; sfr16 TMR2RL =0xca; sfr16 TMR3RL =0xca; sfr16 TMR0 = 0xCC; sfr16 TMR1 = 0xCC; sfr16 TMR2 = 0xcc; sfr16 TMR3 = 0xcc; //-----------------------------------------------------------------------------// 全局變量定義//-----------------------------------------------------------------------------char i;int result; //-----------------------------------------------------------------------------//定義常量//-----------------------------------------------------------------------------#define SYSCLK 49000000 #define SAMPLE_RATE 50000 //------------------------------------------------------------------------------------// 定義函數//------------------------------------------------------------------------------------void SYSCLK_Init (void);void PORT_Init (void);void Timer0_Init (int counts);void Timer1_Init (int counts);void Timer2_Init (int counts);void Timer3_Init (int counts);void ADC0_Init(void);void ADC0_ISR (void);void ADC0_CNVS_ADC0h(void);//------------------------------------------------------------------------------------// 主程序//------------------------------------------------------------------------------------ void maIn (void) { int ADCRESULT[50] ; int k; PCA0MD &= ~0x40; // 禁止看門狗 SYSCLK_Init (); PORT_Init (); Timer0_Init (SYSCLK/SAMPLE_RATE); //Timer1_Init (SYSCLK/SAMPLE_RATE); //選擇相應的啟動方式 //Timer2_Init (SYSCLK/SAMPLE_RATE); //Timer3_Init (SYSCLK/SAMPLE_RATE); ADC0_Init(); EA=1; while(1) { //ADC0_CNVS_ADC0h(); k=ADC0; ADCRESULT[i]=result; //此處設斷點，觀察ADCRESULT的結果 } }
上傳時間： 2013-10-13
上傳用戶：SimonQQ
溫濕度傳感器 sht11 仿真程序 sbit out =P3^0; //加熱口 //sbit input =P1^1;//檢測口 //sbit speek =P2^0;//報警 sbit clo =P3^7;//時鐘 sbit ST =P3^5;//開始 sbit EOC =P3^6;//成功信號 sbit gwei =P3^4;//個位 sbit swei =P3^3;//十位 sbit bwei =P3^2;//百位 sbit qwei =P3^1;//千位 sbit speak =P0^0;//報警音 sbit bjled =P0^1;//報警燈 sbit zcled =P0^2;//正常LED int count; uchar xianzhi;//取轉換結果 uchar seth;//高時間 uchar setl;//低時間 uchar seth_mi;//高時間 uchar setl_mi;//低時間 bit hlbz;//高低標志 bit clbz; bit spbz; ///定時中斷程序/// void t0 (void) interrupt 1 using 0 { TH0=(65536-200)/256;//5ms*200=1000ms=1s TL0=(65536-200)%256; clo=!clo;//產生時鐘 if(count>5000) { if(hlbz) { if(seth_mi==0){seth_mi=seth;hlbz=0;out=0;} else seth_mi--; } if(!hlbz) { if(setl_mi==0){setl_mi=setl;hlbz=1;out=1;} else setl_mi--; } count=0; } else count++; } ///////////// ///////延時/////// delay(int i) { while(--i); } ///////顯示處理/////// xianshi() { int abcd=0; int i; for (i=0;i<5;i++) { abcd=xianzhi; gwei=1; swei=1; bwei=1; qwei=1; P1=dispcode[abcd/1000]; qwei=0; delay(70); qwei=1; abcd=abcd%1000; P1=dispcode[abcd/100]; bwei=0; delay(70); bwei=1; abcd=abcd%100; P1=dispcode[abcd/10]; swei=0; delay(70); swei=1; abcd=abcd%10; P1=dispcode[abcd]; gwei=0; delay(70); gwei=1; } } doing() { if(xianzhi>100) {bjled=0;speak=1;zcled=1;} else {bjled=1;speak=0;zcled=0;} } void maIn(void) { seth=60;//h60秒 setl=90;//l90秒 seth_mi=60;//h60秒 setl_mi=90;//l90秒 TMOD=0X01;//定時0 16位工作模式 TH0=(65536-200)/256; TL0=(65536-200)%256; TR0=1; //開始計時 ET0=1; //開定時0中斷 EA=1; //開全中斷 while(1) { ST=0; _nop_(); ST=1; _nop_(); ST=0; // EOC=0; xianshi(); while(!EOC) { xianshi(); } xianzhi=P2; xianshi(); doing(); } }
上傳時間： 2013-11-07
上傳用戶：我們的船長
ORCAD在使用的時候總會出現(xiàn)這樣或那樣的問題…但下這個問題比較奇怪…在ORCAD中無法輸出網表…彈出下面的錯誤….這種問題很是奇怪…Netlist Format: tango.dllDesign Name: D:\EDA_PROJECT\PROTEL99SE\YK\SV3200\maIn.DSNERROR [NET0021] Cannot get part.[FMT0024] Ref-des not found. Possible Logical/Physical annotation conflict.[FMT0018] Errors processing intermediate file找了一天沒找到問題…終于在花了N多時間后發(fā)現(xiàn)問題所在…其實這個問題就是不要使用ORCAD PSPICE 庫里面的元件來畫電路圖…實際中我是用了PSPICE里面和自己制作的二種電阻和電容混合在一起…就會出現(xiàn)這種問題…
上傳時間： 2013-11-02
上傳用戶：sz_hjbf
This document provides practical, common guidelines for incorporating PCI Express interconnect layouts onto Printed Circuit Boards (PCB) ranging from 4-layer desktop baseboard designs to 10- layer or more server baseboard designs. Guidelines and constraints in this document are intended for use on both baseboard and add-in card PCB designs. This includes interconnects between PCI Express devices located on the same baseboard (chip-to-chip routing) and interconnects between a PCI Express device located “down” on the baseboard and a device located “up” on an add-in card attached through a connector. This document is intended to cover all major components of the physical interconnect including design guidelines for the PCB traces, vias and AC coupling capacitors, as well as add-in card edge-finger and connector considerations. The intent of the guidelines and examples is to help ensure that good high-speed signal design practices are used and that the timing/jitter and loss/attenuation budgets can also be met from end-to-end across the PCI Express interconnect. However, while general physical guidelines and suggestions are given, they may not necessarily guarantee adequate performance of the interconnect for all layouts and implementations. Therefore, designers should consider modeling and simulation of the interconnect in order to ensure compliance to all applicable specifications. The document is composed of two maIn sections. The first section provides an overview of general topology and interconnect guidelines. The second section concentrates on physical layout constraints where bulleted items at the beginning of a topic highlight important constraints, while the narrative that follows offers additional insight.
上傳時間： 2014-01-24
上傳用戶：s363994250
