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自己寫的iic配置芯片的源程序

自己寫的iic配置芯片的源程序，沒有仲裁，只有一個(gè)master,多個(gè)slave.我正在做hdmi接口，歡迎探討376193764

標(biāo)簽： iic 芯片源程序

上傳時(shí)間： 2013-12-30

上傳用戶：anng
某紙業(yè)公司的固定資產(chǎn)管理系統(tǒng)

某紙業(yè)公司的固定資產(chǎn)管理系統(tǒng)，主要有以下功能：資產(chǎn)管理折舊管理查詢管理報(bào)表管理系統(tǒng)管理增加固定資產(chǎn) 減少固定資產(chǎn) 借出固定資產(chǎn) 歸還固定資產(chǎn) 送修固定資產(chǎn) 完修固定資產(chǎn) 計(jì)算月度折舊統(tǒng)計(jì)月度折舊匯總月度折舊查詢減少資產(chǎn) 查詢送修資產(chǎn) 查詢完修資產(chǎn) 查詢出借資產(chǎn) 查詢歸還資產(chǎn) 資產(chǎn)卡片報(bào)表累計(jì)折舊報(bào)表部門資產(chǎn)報(bào)表分類資產(chǎn)報(bào)表登錄管理系統(tǒng) 退出管理系統(tǒng) 新建操作用戶修改用戶信息修改用戶密碼查詢用戶密碼分配用戶權(quán)限公司信息設(shè)置公司部門設(shè)置系統(tǒng)幫助信息會(huì)員管理結(jié)合了Asp.net2.0中的MemberShip，還應(yīng)用了SiteMap和master文件等默認(rèn)管理員帳號(hào)：51aspx，密碼：51aspx.com App_Data下為數(shù)據(jù)庫(kù)文件，默認(rèn)為Sql2005 MySQL下為數(shù)據(jù)庫(kù)生成Sql語句，如果安裝了Sql2005則可以忽略此步驟

標(biāo)簽： 管理系統(tǒng)

上傳時(shí)間： 2016-07-07

上傳用戶：ippler8
GiPS是一個(gè)面向數(shù)據(jù)密集型應(yīng)用的分布式文件系統(tǒng)

GiPS是一個(gè)面向數(shù)據(jù)密集型應(yīng)用的分布式文件系統(tǒng)，整個(gè)系統(tǒng)由master節(jié)點(diǎn)、數(shù)據(jù)節(jié)點(diǎn)和客戶端組成，具有一定的容錯(cuò)性和可擴(kuò)展性。系統(tǒng)的通信使用了中間件平臺(tái)ICE，并使用C++語言進(jìn)行開發(fā)實(shí)現(xiàn)。GiPS具備了文件系統(tǒng)的基本功能，實(shí)現(xiàn)了對(duì)數(shù)據(jù)的流式讀寫操作，并有一定的容錯(cuò)功能。

標(biāo)簽： GiPS 數(shù)據(jù)密集型分布式文件系統(tǒng)

上傳時(shí)間： 2016-09-01

上傳用戶：sy_jiadeyi
The Inter IC bus or I2C bus is a simple bidirectional two wire bus designed primarily for general co

The Inter IC bus or I2C bus is a simple bidirectional two wire bus designed primarily for general control and data transfer communication between ICs. Some of the features of the I2C bus are: • Two signal lines, a serial data line (SDA) and a serial clock line (SCL), and ground are required. A 12V supply line (500mA max.) for powering the peripherals often may be present. • Each device connected to the bus is software addressable by a unique address and simple master/ slave relationships exist at all times masters can operate as master-transmitters or as master-receivers. • The I2C bus is a true multi-master bus including collision detection and arbitration to prevent data corruption if two or more masters simultaneously initiate data transfer systems. • Serial, 8-bit oriented, bidirectional data transfers can be made at up to 100 KBit/s in the standard mode or up to 400 KBit/s in the fast mode.

標(biāo)簽： bus bidirectional primarily designed

上傳時(shí)間： 2013-12-11

上傳用戶：jeffery
iic總線控制器VHDL實(shí)現(xiàn) -- VHDL Source Files: i2c.vhd -- top level file i2c_control.vhd -- control

iic總線控制器VHDL實(shí)現(xiàn) -- VHDL Source Files: i2c.vhd -- top level file i2c_control.vhd -- control function for the I2C master/slave shift.vhd -- shift register uc_interface.vhd -- uC interface function for an 8-bit 68000-like uC upcnt4.vhd -- 4-bit up counter i2c_timesim.vhd -- post-route I2C simulation netlist

標(biāo)簽： VHDL c_control vhd control

上傳時(shí)間： 2016-10-30

上傳用戶：woshiayin
自適應(yīng)turbo碼OFDM的研究論文。國(guó)外碩士論文

自適應(yīng)turbo碼OFDM的研究論文。國(guó)外碩士論文，對(duì)OFDM研究者有一定的參考作用。-- adaptive turbo-coded OFDM, Thesis submitted to the Faculty of the Virginia Polytechnic Institute and State university in partial fulfillment of the requirements for the degree of master of Science in Electrical Engineering.

標(biāo)簽： turbo OFDM 論文碩士

上傳時(shí)間： 2013-12-09

上傳用戶：784533221
Use the links below to download a source distribution of Ant from one of our mirrors. It is good pra

Use the links below to download a source distribution of Ant from one of our mirrors. It is good practice to verify the integrity of the distribution files, especially if you are using one of our mirror sites. In order to do this you must use the signatures from our main distribution directory. Ant is distributed as zip, tar.gz and tar.bz2 archives - the contents are the same. Please note that the tar.* archives contain file names longer than 100 characters and have been created using GNU tar extensions. Thus they must be untarred with a GNU compatible version of tar. If you do not see the file you need in the links below, please see the master distribution directory or, preferably, its mirror.

標(biāo)簽： distribution download mirrors source

上傳時(shí)間： 2014-01-06

上傳用戶：xuanchangri
mcu與cpld之間spi接口程序

mcu與cpld之間spi接口程序，mcu為master，cpld用verilog寫成slave模塊

標(biāo)簽： cpld mcu spi 接口程序

上傳時(shí)間： 2014-07-06

上傳用戶：chongcongying
基于freescale MC9S12XF512 MCU

基于freescale MC9S12XF512 MCU，芯片自帶Flexray通信控制器。可實(shí)現(xiàn)高達(dá)10Mb/s的Flxray通信.本程序主要功能： 1) 500ms實(shí)時(shí)中斷。 2) SPI master 運(yùn)行于500kHz。 3) Flexray 總線以1.25Mbit/s 通信。

標(biāo)簽： freescale 512 MC9 S12

上傳時(shí)間： 2016-12-07

上傳用戶：zhaiye
基于freescale MC9S12XF512 MCU

基于freescale MC9S12XF512 MCU，芯片自帶Flexray通信控制器。可實(shí)現(xiàn)高達(dá)10Mb/s的Flxray通信. 本程序主要功能： 1) 500ms實(shí)時(shí)中斷。 2) SPI master 運(yùn)行于500kHz。 3) Flexray 總線以1.25Mbit/s 通信。

標(biāo)簽： freescale 512 MC9 S12

上傳時(shí)間： 2014-01-18

上傳用戶：梧桐

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