The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) development. The IP cores are centered around the common on-chip bus, and use a coherent method for simulation and synthesis. The library is vendor independent, with support for different CAD tools and target technologies. A unique plug&play method is used to configure and connect the IP cores without the need to modify any global resources.
MantisChess -- A Chinese Chess Program
Copyright (C) Chen Chengtao, China
This program is free software you can redistribute it and/or
modify it under the terms of the GNU General Public License
as published by the Free Software Foundation either version 2
of the License, or (at your option) any later version.
-- Title : Barrel Shifter (Pure combinational)
-- This VHDL design file is an open design you can redistribute it and/or
-- modify it and/or implement it after contacting the author
-- You can check the draft license at
ZIP壓縮、解壓縮算法庫，完全C++實現，支持多種平臺。下面是英文描述：
This library adds zip compression and decompression functionality to your program, allowing you to create and modify ZIP files in the compatible way with WinZip, PKZIP and other popular archivers.
Its easy and practical interface makes the library suitable for the beginners as well as for the advanced users.
2005
Center for Biological & Computational Learning at MIT and MIT
All rights reserved.
Permission to copy and modify this data, software, and its documentation only
for internal research use in your organization is hereby granted, provided
that this notice is retained thereon and on all copies. This data and software
should not be distributed to anyone outside of your organization without
explicit written authorization by the author(s) and MIT.
This application uses OleDb as a backhand communicator with the file to allow the user to : select, delete, insert and modify the database and then save all the changes to the original file.
