說明: 基于CC2541藍(lán)牙模塊與單片機(jī)的串口通信,ble藍(lán)牙透?jìng)?,安卓手機(jī)app與源碼,串口調(diào)試助手(Based on CC2541 Bluetooth module and MCU serial communication, ble Bluetooth transparent transmission, Android mobile app and source code, serial debugging assistant)
標(biāo)簽: cc2541 藍(lán)牙 單片機(jī) 串口通信
上傳時(shí)間: 2022-05-16
上傳用戶:
說明: STM8S單片機(jī)驅(qū)動(dòng)CC1101 433無線模塊 實(shí)現(xiàn)發(fā)送數(shù)據(jù)和接收數(shù)據(jù)。(STM8S single-chip microcomputer drives CC1101 433 wireless module to transmit data and receive data)
標(biāo)簽: stm8s 單片機(jī) 驅(qū)動(dòng)
上傳時(shí)間: 2022-05-16
上傳用戶:
ap6255驅(qū)動(dòng)ap6255是一款支持藍(lán)牙BT4.2+WiFi支持11ac雙頻的藍(lán)牙11ac雙頻WiFi二合一模塊,采用博通BCM43455方案,支持Win10/Android操作系統(tǒng);ap6255無線模塊符合IEEE802.11 a/b/g/n/ac標(biāo)準(zhǔn),能在802.11ac單流下實(shí)現(xiàn)433.3Mbps的速率連接到無線局域網(wǎng)。綜合module提供了用于藍(lán)牙的wifi、UART/PCM接口的SDIO接口。該緊湊模塊是WiFi+BT技術(shù)的組合的總解決方案。本模塊專為智能手機(jī)和便攜式設(shè)備開發(fā)。AP6255特性:IEEE802.11a/b/g/n/ac雙頻虛擬同步雙頻無線電單流空間復(fù)用高達(dá)433.3 mbps的數(shù)據(jù)速率支持20,40,80兆赫頻道的可選SGI(256 QAM調(diào)制)帶集成Class1PA和低能量(BLE)支持的藍(lán)牙v4.0+EDR并發(fā)藍(lán)牙和WLAN操作單天線同時(shí)接收BT/WLAN支持標(biāo)準(zhǔn)SDIOV3.0,并與SDIOv2.0主機(jī)接口向后兼容:SDIOV3.0(4位)-在SDR104模式下最高可達(dá)208MHz時(shí)鐘速率BT主機(jī)數(shù)字接口:-UART(高達(dá)4 Mbps)成的模具解決方案ECI-增強(qiáng)的共存支持、協(xié)調(diào)WLAN接收的BTSCO傳輸?shù)哪芰?/p>
標(biāo)簽: ap6255 驅(qū)動(dòng) 藍(lán)牙
上傳時(shí)間: 2022-05-20
上傳用戶:
說明: 基于單片機(jī)的rc522模塊的門禁系統(tǒng)源碼以及原理圖(The source code and schematic diagram of the entrance guard system of rc522 module based on single chip microcomputer)
標(biāo)簽: 門禁系統(tǒng)
上傳時(shí)間: 2022-06-06
上傳用戶:ttalli
【例3.1]4位全加器module adder 4(cout,sum i na,i nb,cin);output[3:0]sum output cout;input[3:0]i na,i nb;input cin;assign(cout,suml=i na +i nb+ci n;endmodule【例3.2]4位計(jì)數(shù)器module count 4(out,reset,clk);output[3:0]out;input reset,cl k;regl 3:01 out;always@posedge clk)
標(biāo)簽: verilog
上傳時(shí)間: 2022-06-16
上傳用戶:canderile
RX-8801 SA Features built-in 32.768 kHz DTCXO, High Stability Supports l'C-Bus's high speed mode (400 kHz)Alarm interrupt function for day, date, hour, and minute settings Fixed-cycle timer interrupt function Time update interrupt function32.768 kHz output with OE function Auto correction of leap years Wide interface voltage range: 2.2 V to 5.5 V Wide time-keeping voltage range:1.8 V to 5.5 V Low current consumption: 0.84A/3V (Typ.)is an IC bus interface-compliant real-time clock which includes a 32.768 kHz DTCXO In addition to providing a calendar (year, month, date, day, hour, minute, second) function and a clock counter function, this module provides an abundance of other functions including an alarm function, fixed-cycle timer unction, time update interrupt function, and 32.768 kHz output function.The devices in this module are fabricated via a C-MOS process for low current consumption, which enables ong-term battery back-up.
上傳時(shí)間: 2022-06-17
上傳用戶:
關(guān)于Xilinx IS(14.2)簡(jiǎn)單使用方法介紹安裝ISE軟件基本上是一路點(diǎn)擊鼠標(biāo)就是,但必須安裝注冊(cè)表文件,可在網(wǎng)上查找,可能是一個(gè)生成注冊(cè)表文件或注冊(cè)表文件(license),功能仿真是在設(shè)計(jì)輸入后進(jìn)行;時(shí)序仿真是在邏輯綜合后或布局布線后進(jìn)行。(系統(tǒng)差不多占20GB硬盤)1創(chuàng)建工程文件(New Projiect)File New Projiect。如輸入文件名:Two20ne.在上圖點(diǎn)擊Next鍵,彈出如下窗口,設(shè)置一些參數(shù),如下圖所示:創(chuàng)建資源文件(New Source)ProjectNew Source。如輸入文件名:One2Two.選擇模型,如Verilog module,輸入HDL語言,或輸入原理圖。或Project>Add Source,,增加已存在的資源文件(*v)。實(shí)例:二選一電路。點(diǎn)擊Next鍵,彈出如下窗口,
上傳時(shí)間: 2022-06-18
上傳用戶:shjgzh
Mathematical modeling has become an important part of the research and devclopment work in engineering and scicnce. Retaining a competitive edge requiresa fast path between ideas and prototypes, and in this regard mathematical modeling and simulation provide a valuable shortcut for understanding both qualitative and quantitative aspects of scientific and engineering design. To assist you in gaining this edge, COMSOL Multiphysics offers state-of-the art performance, being built from the ground up with a Java3D interface and C/C++ solvers.The Acoustics module is an optional package that extends the COMSOL Multiphysicsmodcling cnvironment with customized user interfaces and functionality optimizcd for the analysis of acoustics. Like all modules in the COMSOL family, it provides a brary of prewritten ready-to-run models that make it quicker and casier to analyze disciplinc-specific problcms.
上傳時(shí)間: 2022-06-19
上傳用戶:
SPI協(xié)議及工作原理分析一、概述.SPI,Serial Perripheral Interface,串行外圍設(shè)備接口,是Motorola公司推出的一種同步串行接口技術(shù).SPI總線在物理上是通過接在外圍設(shè)備微控制器(PICmicro)上面的微處理控制單元(MCU)上叫作同步串行端口(Synchronous Serial Port)的模塊(module)來實(shí)現(xiàn)的,它允許MCU以全雙工的同步串行方式與各種外圍設(shè)備進(jìn)行高速數(shù)據(jù)通信SPI主要應(yīng)用在EEPROM,F(xiàn)lash,實(shí)時(shí)時(shí)鐘(RTC),數(shù)模轉(zhuǎn)換器(ADC),數(shù)字信號(hào)處理器(DSP)以及數(shù)字信號(hào)解碼器之間它在芯片中只占用四根管腳(Pin)用來控制以及數(shù)據(jù)傳輸,節(jié)約了芯片的pin 數(shù)目,同時(shí)為PCB在布局上節(jié)省了空間.正是出于這種簡(jiǎn)單易用的特性,現(xiàn)在越來越多的芯片上都集成了SPl技術(shù)。
標(biāo)簽: spi協(xié)議
上傳時(shí)間: 2022-06-24
上傳用戶:jiabin
在UEFI開源社區(qū)中,存在四個(gè)與UEFI BIOS相關(guān)的開源項(xiàng)目,分別為EDK(EFI Dev Kit),EDKII,EFI Shell和EFI Toolkit.其中,EDKII(EFI Development Kit)是一個(gè)開源的EFI BIOS的發(fā)布框架,其中包含一系列的開發(fā)示例和大量基本的底層庫函數(shù),因此,對(duì)于其MDE(module Development Environment)模塊開發(fā)環(huán)境的分析與測(cè)試能夠在最大程度上保證開發(fā)的穩(wěn)定性和質(zhì)量。因而選題具有一定的實(shí)用性和先進(jìn)性,此外,整個(gè)分析和測(cè)試設(shè)計(jì)的過程中,能夠充分體現(xiàn)出在UEFI從事程序設(shè)計(jì)相對(duì)于傳統(tǒng)BIOS環(huán)境下的優(yōu)勢(shì)。本論文計(jì)劃從以下幾個(gè)方面進(jìn)行研究:1、學(xué)習(xí)研究UEFI(統(tǒng)一可拓展固件接口)技術(shù);2、學(xué)習(xí)研究EDKII框架和相應(yīng)的MDE(模塊開發(fā)環(huán)境);3、搭建MDE庫的測(cè)試框架MdeTestPkg:4、編寫MdeTestPkg下的測(cè)試實(shí)例,實(shí)現(xiàn)對(duì)MDE庫的分析與測(cè)試。通過對(duì)現(xiàn)有的UEFT(統(tǒng)一可擴(kuò)展固件按口)技術(shù)的學(xué)習(xí),深入了解UEFI BIOS的背景知識(shí)。在此基礎(chǔ)上,學(xué)習(xí)研究EDK II的整體架構(gòu)和模塊單元開發(fā)設(shè)計(jì)的規(guī)范和方法,并用基于EDK 11搭建MDE(模塊開發(fā)環(huán)境)的測(cè)試框架,編寫類庫的測(cè)試實(shí)例。最終的結(jié)果是完成MDE,即模塊開發(fā)環(huán)境框架中的44個(gè)庫類在DXE階段的功能分析與測(cè)試,并且由于類際的4通性,使得測(cè)試的類際能夠在不同的平臺(tái)架構(gòu)(如:IA32,X64和IPF等)上成功運(yùn)行,具有很好的穩(wěn)定性和健壯性。在本論文中,我只以NT32平臺(tái)架構(gòu)為例,來說明MDE庫在NT32平臺(tái)下的測(cè)試框架的搭建以及對(duì)于MDE庫類的測(cè)試實(shí)例的設(shè)計(jì),編寫和測(cè)試。
上傳時(shí)間: 2022-06-26
上傳用戶:kent
蟲蟲下載站版權(quán)所有 京ICP備2021023401號(hào)-1