java applet code for generating RSA key pair
標(biāo)簽： generating applet java code
上傳時間： 2014-08-15
上傳用戶：manking0408
Export rsa private/public key pair
標(biāo)簽： private Export public pair
上傳時間： 2017-09-26
上傳用戶：ggwz258
基于高通QCC5141的支持微軟swift pair功能之TWS耳機(jī)方案
上傳時間： 2022-05-10
上傳用戶：zhanglei193
Abstract: Alexander Graham Bell patented twisted pair wires in 1881. We still use them today because they work so well. In addition we have the advantage ofincredible computer power within our world. Circuit simulators and filter design programs are available for little or no cost. We combine the twisted pair and lowpassfilters to produce spectacular rejection of radio frequency interference (RFI) and electromagnetic interference (EMI). We also illustrate use of a precision resistorarray to produce a customizable differential amplifier. The precision resistors set the gain and common mode rejection ratios, while we choose the frequencyresponse.
上傳時間： 2014-11-26
上傳用戶：Vici
To this day, Power over Ethernet (PoE) continues to gainpopularity in today’s networking world. The 12.95Wdelivered to the Powered Device (PD) input supplied bythe Power Sourcing Equipment (PSE) is a universal supply.Each PD provides its own DC/DC conversion from anominal 48V supply, thus eliminating the need for a correctvoltage wall adapter. However, higher power devicescan not take advantage of standard PoE because of itspower limitations, and must rely on a large wall adapteras their primary supply. The new LTC4268-1 breaks thispower barrier by allowing for power of up to 35W for suchpower-hungry 2-pair PoE applications. The LTC4268-1provides a complete solution by integrating a high powerPD interface control with an isolated fl yback controller.
上傳時間： 2014-12-24
上傳用戶：jasson5678
The MAX9257/MAX9258 programmable serializer/deserializer (SerDes) devices transfer both video data and control signals over the same twisted-pair cable. However, control data can only be transmitted during the vertical blank time, which is indicated by the control-channel-enabled output (CCEN) signal. The electronic control unit (ECU) firmware designer needs to know how quickly to respond to the CCEN signal before it times out and how to calculate this duration. This application note describes how to calculate the duration of the CCEN for the MAX9257/MAX9258 SerDes chipset. The calculation is based on STO timeout, clock frequency, and UART bit timing. The CCEN duration is programmable and can be closed if not in use.
標(biāo)簽： SerDes MAXX 9257 9258
上傳時間： 2014-01-24
上傳用戶：xingisme
The SN65LBC170 and SN75LBC170 aremonolithic integrated circuits designed forbidirectional data communication on multipointbus-transmission lines. Potential applicationsinclude serial or parallel data transmission, cabledperipheral buses with twin axial, ribbon, ortwisted-pair cabling. These devices are suitablefor FAST-20 SCSI and can transmit or receivedata pulses as short as 25 ns, with skew lessthan 3 ns.These devices combine three 3-state differentialline drivers and three differential input linereceivers, all of which operate from a single 5-Vpower supply.The driver differential outputs and the receiverdifferential inputs are connected internally to formthree differential input/output (I/O) bus ports thatare designed to offer minimum loading to the buswhenever the driver is disabled or VCC = 0. Theseports feature a wide common-mode voltage rangemaking the device suitable for party-lineapplications over long cable runs.
上傳時間： 2013-10-13
上傳用戶：ytulpx
The PCA9540B is a 1-of-2 bidirectional translating multiplexer, controlled via the I2C-bus.The SCL/SDA upstream pair fans out to two SCx/SDx downstream pairs, or channels.Only one SCx/SDx channel is selected at a time, determined by the contents of theprogrammable control register.
標(biāo)簽： 2channel 9540B 9540 mult
上傳時間： 2014-12-28
上傳用戶：nshark
The PCA9542A is a 1-of-2 bidirectional translating multiplexer, controlled via the I2C-bus.The SCL/SDA upstream pair fans out to two SCx/SDx downstream pairs, or channels.Only one SCx/SDx channel is selected at a time, determined by the contents of theprogrammable control register. Two interrupt inputs, INT0 and INT1, one for each of theSCx/SDx downstream pairs, are provided. One interrupt output, INT, which acts as anAND of the two interrupt inputs, is provided.
標(biāo)簽： 2channel 9542A 9542 mult
上傳時間： 2013-12-07
上傳用戶：europa_lin
The PCA9546A is a quad bidirectional translating switch controlled via the I2C-bus. TheSCL/SDA upstream pair fans out to four downstream pairs, or channels. Any individualSCx/SDx channel or combination of channels can be selected, determined by thecontents of the programmable control register.
標(biāo)簽： channel 9546A 9546 PCA
上傳時間： 2013-11-16
上傳用戶：cc1915
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