The 4.0 kbit/s speech codec described in this paper is based on a Frequency Domain Interpolative (FDI) coding technique, which belongs to the class of prototype waveform Interpolation (PWI) coding techniques. The codec also has an integrated voice activity detector (VAD) and a noise reduction capability. The input signal is subjected to LPC analysis and the prediction residual is separated into a slowly evolving waveform (SEW) and a rapidly evolving waveform (REW) components. The SEW magnitude component is quantized using a hierarchical predictive vector quantization approach. The REW magnitude is quantized using a gain and a sub-band based shape. SEW and REW phases are derived at the decoder using a phase model, based on a transmitted measure of voice periodicity. The spectral (LSP) parameters are quantized using a combination of scalar and vector quantizers. The 4.0 kbits/s coder has an algorithmic delay of 60 ms and an estimated floating point complexity of 21.5 MIPS. The performance of this coder has been evaluated using in-house MOS tests under various conditions such as background noise. channel errors, self-tandem. and DTX mode of operation, and has been shown to be statistically equivalent to ITU-T (3.729 8 kbps codec across all conditions tested.
標簽： frequency-domain interpolation performance Design kbit_s speech coder based and of
上傳時間： 2018-04-08
上傳用戶：kilohorse
Design and Control of an LCL-filter-based three-phase active rectifier 早期的文章
標簽： LCL-filter-based three-phase rectifier control Design active and an of
上傳時間： 2018-05-19
上傳用戶：wangweiyaorui
//CONFIG 1 #pragma config FCMEN=OFF,IESO=OFF,CLKOUTEN=OFF,BOREN=NSLEEP,CPD=OFF #pragma config CP=ON,MCLRE=OFF,PWRTE=OFF,WDTE=OFF,FOSC=INTOSC //CONFIG 2 #pragma config LVP=OFF,BORV=LO,STVREN=OFF,PLLEN=OFF #pragma config VCAPEN=OFF,WRT=HALF
標簽： xc8
上傳時間： 2018-06-26
上傳用戶：HMHAZM
Digital cellular telecommunications system (Phase 2+); Technical realization of the Short Message Service (SMS) Point-to-Point (PP) (3GPP TS 03.40 version 7.5.0 Release 1998)
標簽： GSM
上傳時間： 2019-06-14
上傳用戶：twogozi
Digital cellular telecommunications system (Phase 2+); Security mechanisms for SIM application toolkit; Stage 2 (3GPP TS 03.48 version 8.8.0 Release 1999)
標簽： GSM
上傳時間： 2019-06-14
上傳用戶：twogozi
PRODUCT DESCRIPTION The AD810 is a composite and HDTV compatible, current feedback, video operational amplifier, ideal for use in systems such as multimedia, digital tape recorders and video cameras. The 0.1 dB flatness specification at bandwidth of 30 MHz (G = +2) and the differential gain and phase of 0.02% and 0.04° (NTSC) make the AD810 ideal for any broadcast quality video system. All these specifications are under load conditions of 150 ? (one 75 ? back terminated cable). The AD810 is ideal for power sensitive applications such as video cameras, offering a low power supply current of 8.0 mA max. The disable feature reduces the power supply current to only 2.1 mA, while the amplifier is not in use, to conserve power. Furthermore the AD810 is specified over a power supply range of ±5 V to ±15 V.
上傳時間： 2020-04-19
上傳用戶：su1254
transimpedance linearization circuitry. This allows it to drive video loads with excellent differential gain and phase perfor mance on only 50 mW of power. The AD8001 is a current feedback amplifier and features gain flatness of 0.1 dB to 100 MHz while offering differential gain and phase error of 0.01% and 0.025°. This makes the AD8001 ideal for professional video electronics such as cameras and video switchers. Additionally, the AD8001’s low distortion and fast settling make it ideal for buffer high-speed A-to-D converters. The AD8001 offers low power of 5.5 mA max (VS = ±5 V) and can run on a single +12 V power supply, while being capable of delivering over 70 mA of load current. These features make this amplifier ideal for portable and battery-powered applications where size and power are critical. The outstanding bandwidth of 800 MHz along with 1200 V/μs of slew rate make the AD8001 useful in many general purpose high-speed applications where dual power supplies of up to ±6 V and single supplies from 6 V to 12 V are needed. The AD8001 is available in the industrial temperature range of –40°C to +85°C.
上傳時間： 2020-04-21
上傳用戶：su1254
Optical communication technology has been extensively developed over the last 50 years, since the proposed idea by Kao and Hockham [1]. However, only during the last 15 years have the concepts of communication foundation, that is, the modulation and demodulation techniques, been applied. This is pos- sible due to processing signals using real and imaginary components in the baseband in the digital domain. The baseband signals can be recovered from the optical passband region using polarization and phase diversity tech- niques, as well as technology that was developed in the mid-1980s.
標簽： Transmission Processing Digital Optical
上傳時間： 2020-05-27
上傳用戶：shancjb
LTE-Advanced becomes a truly global standard for 4G cellular communications. Relay, as one of the key technologies of LTE-Advanced, can significantly extend the coverage, and improve the system throughput. LTE-A standards and tech- nologies were described in several recent books where the limited pages for relay feature prevent the detailed explanations of the technology. In this book, we tried to provide an in-depth description of LTE-A relay development. More specifically, significant portions are spent on relay channel modeling and potential technologies during the study item phase of the development, although some of those tech- nologies, such as Type 2 cooperative relay, multi-hop relay, relay with backhaul of carrier aggregation, were not standardized in Release 10 LTE.
標簽： LTE-Advanced Technology Relay
上傳時間： 2020-05-27
上傳用戶：shancjb
PLL(Phase Locked Loop)： 為鎖相回路或鎖相環，用來統一整合時鐘信號，使高頻器件正常工作，如內存的存取資料等。PLL用于振蕩器中的反饋技術。 許多電子設備要正常工作，通常需要外部的輸入信號與內部的振蕩信號同步。一般的晶振由于工藝與成本原因，做不到很高的頻率，而在需要高頻應用時，由相應的器件VCO，實現轉成高頻，但并不穩定，故利用鎖相環路就可以實現穩定且高頻的時鐘信號。
上傳時間： 2021-07-23
上傳用戶：紫陽帝尊
