This distribution contains source code for a simple object tracking program using particle filtering. You need to have the OpenCV Library and the GNU Scientific Library (GSL) installed to compile and use the programs. See the below two links:
標(biāo)簽： distribution contains filterin particle
上傳時間： 2017-04-08
上傳用戶：talenthn
c pgm to find redundant paths in a graph.Many fault-tolerant network algorithms rely on an underlying assumption that there are possibly distinct network paths between a source-destination pair. Given a directed graph as input, write a program that uses depth-first search to determine all such paths. Note that, these paths are not vertex-disjoint i.e., the vertices may repeat but they are all edge-disjoint i.e., no two paths have the same edges. The input is the adjacency matrix of a directed acyclic graph and a pair(s) of source and destination vertices and the output should be the number of such disjoint paths and the paths themselves on separate lines. In case of multiple paths the output should be in order of paths with minimum vertices first. In case of tie the vertex number should be taken in consideration for ordering.
標(biāo)簽： fault-tolerant algorithms redundant underlyin
上傳時間： 2013-12-18
上傳用戶：jkhjkh1982
Shortest Paths with Multiplicative Cost. In a given undirected graph, the path cost is measured as a product of all the edges in the path. The weights are rational numbers (e.g., 0.25, 0.75, 3.75 etc) or integers (2, 3). There are no negative edges. Given such a graph as input, you are to output the shortest path between any two given vertices. Input is the adjacency matrix and the two vertices. You must output the path.
標(biāo)簽： Multiplicative undirected Shortest measured
上傳時間： 2017-04-08
上傳用戶：邶刖
The AT24C512 provides 524,288 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 65,536 words of 8 bits each. The device鈥檚 cascadable feature allows up to four devices to share a common two-wire bus. The device is optimized for use in many industrial and commercial applications where lowpower and low-voltage operation are essential. The devices are available in spacesaving 8-pin PDIP, 8-lead EIAJ SOIC, 8-lead JEDEC SOIC, 8-lead TSSOP, 8-lead Leadless Array (LAP), and 8-lead SAP packages. In addition, the entire family is available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 3.6V) versions.
標(biāo)簽： electrically programmable provides erasable
上傳時間： 2017-04-09
上傳用戶：cc1015285075
Please read your package and describe it at least 40 bytes. System will automatically delete the directory of debug and release, so please do not put files on these two directory.
標(biāo)簽： automatically describe package Please
上傳時間： 2013-12-19
上傳用戶：極客
Fortran 90 versions of all the Numerical Recipes routines appear in the following Chapters B1 through B20, numbered in correspondence with Chapters 1 through 20 in Volume 1. Within each chapter, the routines appear in the same order as in Volume 1, but not broken out separately by section number within Volume 1鈥檚 chapters. There are commentaries accompanying many of the routines, generally following the printed listing of the routine to which they apply. These are of two kinds: issues related to parallelizing the algorithm in question, and issues related to the Fortran 90 implementation. To distinguish between these two, rather different, kind
標(biāo)簽： Numerical following the Chapters
上傳時間： 2017-04-12
上傳用戶：6546544
digital modulation System will automatically delete the directory of debug and release, so please do not put files on these two directory.
標(biāo)簽： automatically modulation directory digital
上傳時間： 2014-01-19
上傳用戶：yepeng139
package and describe it at least 40 bytes. System will automatically delete the directory of debug and release, so please do not put files on these two directory
標(biāo)簽： automatically directory describe package
上傳時間： 2013-12-15
上傳用戶：fanboynet
The paper describes the concept and realization of the DOOCS control software for FPGAbased TESLA cavity controller and simulator (SIMCON). It bases on universal software components, created for laboratory purposes and used in MATLAB based control environment. These modules have been recently adapted to the DOOCS environment to ensure a unified software to hardware communication model. The presented solution can be also used as a general platform for control algorithms development. The proposed interfaces between MATLAB and DOOCS modules allow to check the developed algorithm in the operation environment before implementation in the FPGA. As the examples two systems have been presented.
標(biāo)簽： realization FPGAbased describes the
上傳時間： 2017-04-16
上傳用戶：koulian
The purpose of this project is to explore the issues and implementation of a multiple instruction stream, single data stream processor. We are running two instruction streams on two CPUs which share an address space. The processors share a second level cache, and maintain coherence at the L1 cache with a write-invalidate policy. The L2 cache is two-way set associative, with a block size of 8 words, and a total capacity of 512 words.
標(biāo)簽： implementation instruction multiple purpose
上傳時間： 2017-04-18
上傳用戶：731140412
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