The ISO7220 and ISO7221 are dual-channel digital isolators. To facilitate PCB layout, the channels are oriented
in the same direction in the ISO7220 and in opposite directions in the ISO7221. These devices have a logic input
and output buffer separated by TI’s silicon-dioxide (SiO2) isolation barrier, providing galvanic isolation of up to
4000 V. Used in conjunction with isolated power supplies, these devices block high voltage, isolate grounds, and
prevent noise currents on a data bus or other circuits from entering the local ground and interfering with or
damaging sensitive circuitry.
資源簡(jiǎn)介：The ISO7220 and ISO7221 are DUAL-channel DIGITAL ISOLATORS. To facilitate PCB layout, the channels are orientedin the same direction in the ISO7220 and in opposite directions in the ISO7221. These devices have a logic inputand output buffer...
上傳時(shí)間： 2013-10-24
上傳用戶：hbsunhui
資源簡(jiǎn)介：電工學(xué) 上海交大精品課件(趙愛(ài)萍版) PPT版
上傳時(shí)間： 2013-04-15
上傳用戶：eeworm
資源簡(jiǎn)介：Real-Time DIGITAL Signal Processing Implementations, Applications, and Experiments with the TMS320C55x John Wiley & Sons, Inc. 2001 By Sen M. Kuo and Bob H. Lee Additional Examples TMS320C5510 EVM – Real-time DUAL-channel Audio Exam...
上傳時(shí)間： 2013-12-14
上傳用戶：時(shí)代電子小智
資源簡(jiǎn)介：The TW2835 has four high quality NTSC/PAL video decoders, DUAL color display controllers and DUAL video encoders. The TW2835 contains four built-in analog anti-aliasing filters, four 10bit Analog-to-DIGITAL converters, and proprietary DI...
上傳時(shí)間： 2017-03-20
上傳用戶：來(lái)茴
資源簡(jiǎn)介：C++ Algorithms for DIGITAL Signal Processing 第4章 濾波器程序
上傳時(shí)間： 2013-08-01
上傳用戶：eeworm
資源簡(jiǎn)介：·[時(shí)鐘書籍]DIGITAL Clocks for Synchronization and Communications
上傳時(shí)間： 2013-05-24
上傳用戶：tgeyangjh
資源簡(jiǎn)介：·[測(cè)試書籍]ESSENTIALS OF ELECTRONIC TESTING FOR DIGITAL, MEMORY AND MIXED-SIGNAL VLSI CIRCUITS?
上傳時(shí)間： 2013-07-21
上傳用戶：euroford
資源簡(jiǎn)介：·Verilog?HDL:?A?Guide?to?DIGITAL?Design?and??
上傳時(shí)間： 2013-04-24
上傳用戶：誰(shuí)偷了我的麥兜
資源簡(jiǎn)介：·Stanford&IBM牛人經(jīng)典之作 -? DIGITAL Control of Dynamic SystemsEditorial ReviewsProduct DescriptionThis well-respected, market-leading text discusses the use of DIGITAL computers in the real-time co
上傳時(shí)間： 2013-07-31
上傳用戶：cuiyashuo
資源簡(jiǎn)介：DIGITAL Down Converter Design based on FPGA.
上傳時(shí)間： 2013-08-13
上傳用戶：CSUSheep
資源簡(jiǎn)介：直接數(shù)字頻率合成（Direct DIGITAL Fraquency Synthesis,即DDFS，一般簡(jiǎn)稱DDS）是從相位概念出發(fā)直接合成所需要波形的一種新的頻率合成技術(shù)。
上傳時(shí)間： 2013-08-27
上傳用戶：wpt
資源簡(jiǎn)介：My thesis entitled \"fpga DIGITAL clock,\" immature, to enlighten
上傳時(shí)間： 2013-08-31
上傳用戶：smallfish
資源簡(jiǎn)介：Fpga Implementation Of DIGITAL Timing Recovery In Software Radio Receiver
上傳時(shí)間： 2013-09-05
上傳用戶：panpanpan
資源簡(jiǎn)介：? In this paper, we discuss efficient coding and design styles using verilog. This can beimmensely helpful for any DIGITAL designer initiating designs. Here, we address different problems rangingfrom RTL-Gate Level simulation mismatch to...
上傳時(shí)間： 2013-11-22
上傳用戶：han_zh
資源簡(jiǎn)介：Introduce High-Speed DIGITAL System Design.
上傳時(shí)間： 2013-10-20
上傳用戶：gps6888
資源簡(jiǎn)介：? This unique guide to designing DIGITAL VLSI circuits takes a top-down approach, reflecting the natureof the design process in industry. Starting with architecture design, the book explains the why andhow of DIGITAL design, using the ph...
上傳時(shí)間： 2013-11-04
上傳用戶：life840315
資源簡(jiǎn)介：? Piezoelectric motors are used in DIGITAL cameras for autofocus,zooming and optical image stabilization. Theyare relatively small, lightweight and effi cient, but theyalso require a complicated driving scheme. Traditionally,this challen...
上傳時(shí)間： 2013-11-18
上傳用戶：hulee
資源簡(jiǎn)介：介紹了一種基于MSP430系列單片機(jī)和ADXL203加速度傳感器的數(shù)字式傾角儀，它不僅可以實(shí)現(xiàn)水平度檢測(cè)，而且可以測(cè)量00～3600范圍內(nèi)的任意傾角，分辨率可達(dá)O．1。。此外，由于該傾角儀輸出為數(shù)字結(jié)果，因此它也可以與其他的數(shù)字設(shè)備結(jié)合起來(lái)，組合成一個(gè)功能更加...
上傳時(shí)間： 2013-11-14
上傳用戶：lizhizheng88
資源簡(jiǎn)介：The TRS232E is a DUAL driver/receiver that includes a capacitive voltage generator to supply TIA/RS-232-Fvoltage levels from a single 5-V supply. Each receiver converts TIA/RS-232-F inputs to 5-V TTL/CMOS levels.This receiver has a typical ...
上傳時(shí)間： 2013-10-07
上傳用戶：waitingfy
資源簡(jiǎn)介：基于ADSP-BF561的數(shù)字?jǐn)z像系統(tǒng)設(shè)計(jì)Design of DIGITAL Video Camera System Based on DIGITAL Signal ProcessorADSP-BF561（浙江大學(xué) 信息與通信工程研究所，浙江 杭州 310027） 馬海杰, 劉云海摘要：介紹了基于ADI雙核的數(shù)字信號(hào)處理芯片ADSP-BF561 的數(shù)字?jǐn)z...
上傳時(shí)間： 2013-11-10
上傳用戶：yl1140vista
資源簡(jiǎn)介：? The SDI standards are the predominant standards for uncompressed DIGITAL videointerfaces in the broadcast studio and video production center. The first SDI standard,SD-SDI, allowed standard-definition DIGITAL video to be transported...
上傳時(shí)間： 2013-10-08
上傳用戶：yjj631
資源簡(jiǎn)介：? The SDI standards are the predominant standards for uncompressed DIGITAL videointerfaces in the broadcast studio and video production center. The first SDI standard,SD-SDI, allowed standard-definition DIGITAL video to be transported...
上傳時(shí)間： 2013-12-08
上傳用戶：liansi
資源簡(jiǎn)介：? In this paper, we discuss efficient coding and design styles using verilog. This can beimmensely helpful for any DIGITAL designer initiating designs. Here, we address different problems rangingfrom RTL-Gate Level simulation mismatch to...
上傳時(shí)間： 2013-11-23
上傳用戶：我干你啊
資源簡(jiǎn)介：DIGITAL的Unix操作系統(tǒng)VAX 4.2源碼
上傳時(shí)間： 2013-12-24
上傳用戶：我們的船長(zhǎng)
資源簡(jiǎn)介：DIGITAL DATCOM Source Code and Examples
上傳時(shí)間： 2015-01-10
上傳用戶：Divine
資源簡(jiǎn)介：Verilog Coding Style for Efficient DIGITAL Design
上傳時(shí)間： 2015-01-21
上傳用戶：PresidentHuang
資源簡(jiǎn)介：IEEE-1394 DIGITAL Camera Windows Driver
上傳時(shí)間： 2014-01-06
上傳用戶：gxrui1991
資源簡(jiǎn)介：實(shí)時(shí)信號(hào)處理（(eWiley) Real-Time DIGITAL Signal Processing）很好的教材
上傳時(shí)間： 2014-01-18
上傳用戶：Late_Li
資源簡(jiǎn)介：Generation of a Sine Wave Using a TMS320C54x DIGITAL Signal Processor
上傳時(shí)間： 2015-03-04
上傳用戶：asdkin
資源簡(jiǎn)介：US Navy - Electronics Technician, Volume 06--DIGITAL Data Systems
上傳時(shí)間： 2013-11-25
上傳用戶：凌云御清風(fēng)
