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• Design Compiler workshop免費(fèi)下載

  資源簡(jiǎn)介：DC的workshop，適合初學(xué)者使用；講的比較清楚！！！

  標(biāo)簽： Compiler workshop Design

  上傳時(shí)間： 2013-05-28

  上傳用戶：yaohe123

• The DSP Design Flow workshop provides免費(fèi)下載

  資源簡(jiǎn)介：The DSP Design Flow workshop provides an introduction to the advanced tools you need to Design and implement DSP algorithms targeting FPGAs. This intermediate workshop in implementing DSP functions focuses on learning how to use System Gene...

  標(biāo)簽： workshop provides Design Flow

  上傳時(shí)間： 2013-09-02

  上傳用戶：joheace

• Design Compiler使用簡(jiǎn)要說明,說明了用這一工具進(jìn)行綜合的過程免費(fèi)下載

  資源簡(jiǎn)介：Design Compiler使用簡(jiǎn)要說明,說明了用這一工具進(jìn)行綜合的過程

  標(biāo)簽： Compiler Design 過程

  上傳時(shí)間： 2014-02-26

  上傳用戶：wsf950131

• The DSP Design Flow workshop provides an introduction to the advanced tools you need to Design and i免費(fèi)下載

  資源簡(jiǎn)介：The DSP Design Flow workshop provides an introduction to the advanced tools you need to Design and implement DSP algorithms targeting FPGAs. This intermediate workshop in implementing DSP functions focuses on learning how to use System Gene...

  標(biāo)簽： introduction workshop provides advanced

  上傳時(shí)間： 2014-12-06

  上傳用戶：sammi

• a demo script of "carry lookahead adder" for synopsys Design Compiler免費(fèi)下載

  資源簡(jiǎn)介：a demo script of "carry lookahead adder" for synopsys Design Compiler

  標(biāo)簽： lookahead Compiler synopsys script

  上傳時(shí)間： 2016-07-22

  上傳用戶：ZJX5201314

• Advanced ASIC Chip Synthesis Using Synopsys Design Compiler. This second edition of this book descr免費(fèi)下載

  資源簡(jiǎn)介：Advanced ASIC Chip Synthesis Using Synopsys Design Compiler. This second edition of this book describes the advanced concepts and techniques used towards ASIC chip synthesis, physical synthesis, formal verification and static timing an...

  標(biāo)簽： Synthesis Advanced Synopsys Compiler

  上傳時(shí)間： 2017-04-04

  上傳用戶：lanwei

• Design Compiler Optimization Reference Manual免費(fèi)下載

  資源簡(jiǎn)介：Design Compiler Optimization Reference Manual

  標(biāo)簽： Optimization Reference Compiler Design Manual

  上傳時(shí)間： 2019-04-03

  上傳用戶：zsx097

• Design Compiler Register Re-mapping免費(fèi)下載

  資源簡(jiǎn)介：Design Compiler Register Re-mapping

  標(biāo)簽： Re-mapping Compiler Register Design

  上傳時(shí)間： 2019-04-03

  上傳用戶：zsx097

• Advanced ASIC Chip Synthesis Using Synopsys Design Compiler,Physi免費(fèi)下載

  資源簡(jiǎn)介：·Advanced ASIC Chip Synthesis Using Synopsys Design Compiler,Physical Compiler and Primetime

  標(biāo)簽： nbsp Synthesis Advanced Synopsys

  上傳時(shí)間： 2013-04-24

  上傳用戶：alia

• Design Compile 0免費(fèi)下載

  資源簡(jiǎn)介：Design Compiler 2007。新版本擴(kuò)展了拓?fù)浼夹g(shù)，以加速采用先進(jìn)低功耗和測(cè)試技術(shù)的設(shè)計(jì)收斂，幫助設(shè)計(jì)人員提高生產(chǎn)效率和 IC 性能。

  標(biāo)簽： Compile Design

  上傳時(shí)間： 2013-05-29

  上傳用戶：yanqie

• Design COMPILE 0免費(fèi)下載

  資源簡(jiǎn)介：模擬電子精美FLASH課件

  標(biāo)簽： FLASH 模擬電子

  上傳時(shí)間： 2013-05-26

  上傳用戶：eeworm

• Verilog and VHDL狀態(tài)機(jī)設(shè)計(jì)免費(fèi)下載

  資源簡(jiǎn)介：Verilog and VHDL狀態(tài)機(jī)設(shè)計(jì)，英文pdf格式 State machine Design techniques for Verilog and VHDL Abstract : Designing a synchronous finite state Another way of organizing a state machine (FSM) is a common task for a digital logic only one l...

  標(biāo)簽： Verilog VHDL and 狀態(tài)

  上傳時(shí)間： 2013-12-19

  上傳用戶：change0329

• synopsys dc 中文ppt教材免費(fèi)下載

  資源簡(jiǎn)介：synopsys dc 中文ppt教材，比較詳細(xì)! 可是SYnopsys公司培訓(xùn)的教材!難得的好東西!對(duì)學(xué)習(xí)Design Compiler的人非常有幫助

  標(biāo)簽： synopsys dc 教材

  上傳時(shí)間： 2014-11-29

  上傳用戶：weixiao99

• The DHRY program performs the dhrystone benchmarks on the 8051. Dhrystone is a general-performanc免費(fèi)下載

  資源簡(jiǎn)介：The DHRY program performs the dhrystone benchmarks on the 8051. Dhrystone is a general-performance benchmark test originally developed by Reinhold Weicker in 1984. This benchmark is used to measure and compare the performance of differ...

  標(biāo)簽： general-performanc benchmarks Dhrystone dhrystone

  上傳時(shí)間： 2016-11-30

  上傳用戶：hphh

• Designing a synchronous finite state machine (FSM) is a common task for a digital logic engineer. T免費(fèi)下載

  資源簡(jiǎn)介：Designing a synchronous finite state machine (FSM) is a common task for a digital logic engineer. This paper discusses a variety of issues regarding FSM Design using Synopsys Design Compiler. Verilog and VHDL coding styles are presented...

  標(biāo)簽： synchronous Designing engineer digital

  上傳時(shí)間： 2014-01-17

  上傳用戶：dreamboy36

• 集成電路設(shè)計(jì)制造中EDA工具實(shí)用教程免費(fèi)下載

  資源簡(jiǎn)介：《集成電路設(shè)計(jì)制造中EDA工具實(shí)用教程》共17章，分為三個(gè)部分。第一部分介紹半導(dǎo)體工藝和半導(dǎo)體器件仿真工具，分別介紹了Synopsys公司的TSUPREM4/MEDICI，ISE TCAD和Silvaco公司的Athena/Atlas等TCAD工具及其使用，并以ESD靜電放電防護(hù)器件的設(shè)計(jì)及驗(yàn)證為實(shí)例...

  標(biāo)簽： 集成電路 eda

  上傳時(shí)間： 2022-07-16

  上傳用戶：zhaiyawei

• 本程序集是Allen I. Holub所寫的《Compiler Design in C》一書的附隨軟件免費(fèi)下載

  資源簡(jiǎn)介：本程序集是Allen I. Holub所寫的《Compiler Design in C》一書的附隨軟件，其中有作者自己編寫的詞法分析和語法分析工具LeX，occs和LLama，該軟件包還包括一個(gè)顯示C語言分析過程的程序

  標(biāo)簽： I. Compiler Design Allen

  上傳時(shí)間： 2014-01-08

  上傳用戶：siguazgb

• TMS320C54x DSP Design workshop免費(fèi)下載

  資源簡(jiǎn)介：TMS320C54x DSP Design workshop

  標(biāo)簽： workshop Design 320C TMS

  上傳時(shí)間： 2013-12-25

  上傳用戶：l254587896

• lex files for given decription used as assignment in Compiler Design免費(fèi)下載

  資源簡(jiǎn)介：lex files for given decription used as assignment in Compiler Design

  標(biāo)簽： decription assignment Compiler Design

  上傳時(shí)間： 2017-07-20

  上傳用戶：杜瑩12345

• Modern Compiler Design免費(fèi)下載

  資源簡(jiǎn)介：Modern Compiler Design

  標(biāo)簽： Compiler Modern Design

  上傳時(shí)間： 2019-04-03

  上傳用戶：zsx097

• Mogensen, Introduction to Compiler Design免費(fèi)下載

  資源簡(jiǎn)介：Mogensen, Introduction to Compiler Design, Springer, 2011

  標(biāo)簽： Introduction Mogensen Compiler Design to

  上傳時(shí)間： 2019-04-03

  上傳用戶：zsx097

• Modern Compiler Design免費(fèi)下載

  資源簡(jiǎn)介：Modern Compiler Design

  標(biāo)簽： Compiler Modern Design

  上傳時(shí)間： 2019-04-03

  上傳用戶：zsx097

• Compiler Design：Syntactic and Semantic Analysis免費(fèi)下載

  資源簡(jiǎn)介：Compiler Design：Syntactic and Semantic Analysis

  標(biāo)簽： Syntactic Compiler Analysis Semantic Design and

  上傳時(shí)間： 2019-04-03

  上傳用戶：zsx097

• Compiler Design -- Building An Optimizing Compiler免費(fèi)下載

  資源簡(jiǎn)介：Compiler Design -- Building An Optimizing Compiler

  標(biāo)簽： Compiler Optimizing Building Design An

  上傳時(shí)間： 2019-07-05

  上傳用戶：zsx097

• This manual describes omniidl, the omniORB IDL Compiler. It is intended for developers who wish to免費(fèi)下載

  資源簡(jiǎn)介：This manual describes omniidl, the omniORB IDL Compiler. It is intended for developers who wish to write their own IDL Compiler back-ends, or to modify existing ones. It also documents the Design of the Compiler front-end for those poor s...

  標(biāo)簽： developers describes Compiler intended

  上傳時(shí)間： 2015-10-07

  上傳用戶：84425894

• This Design package includes reference materials for creating a USB - PS/2 combination mouse that a免費(fèi)下載

  資源簡(jiǎn)介：This Design package includes reference materials for creating a USB - PS/2 combination mouse that auto-detects the interface and configures itself to operate on the appropriate bus. Documentation docs - Designing a low cost CY7C6372...

  標(biāo)簽： combination materials reference creating

  上傳時(shí)間： 2015-10-19

  上傳用戶：784533221

• To increase simulation speed, ModelSim® can apply a variety of optimizations to your Design. Thes免費(fèi)下載

  資源簡(jiǎn)介：To increase simulation speed, ModelSim&reg can apply a variety of optimizations to your Design. These include, but are not limited to, mergingprocesses, pulling constants out of loops, clock suppression, and signal collapsing. You control t...

  標(biāo)簽： optimizations simulation ModelSim increase

  上傳時(shí)間： 2013-12-25

  上傳用戶：pkkkkp

• This book is Designed to be used for the purpose to describe the structure of an optimizing Compiler免費(fèi)下載

  資源簡(jiǎn)介：This book is Designed to be used for the purpose to describe the structure of an optimizing Compiler so that a reader can implement it or a variation (Compiler writers always modify a Design).

  標(biāo)簽： optimizing the structure Designed

  上傳時(shí)間： 2013-12-17

  上傳用戶：CHINA526

• software that use for writing the coding, also work with MPLAB for Compiler. (ouput .hex file that c免費(fèi)下載

  資源簡(jiǎn)介：software that use for writing the coding, also work with MPLAB for Compiler. (ouput .hex file that can be use for Design circuit (Proteus))

  標(biāo)簽： that for software Compiler

  上傳時(shí)間： 2013-12-02

  上傳用戶：daguda

• Design with Operational Amplifiers and Analog Integrated Circuits –3rd Edition免費(fèi)下載

  資源簡(jiǎn)介：Design with Operational Amplifiers and Analog Integrated Circuits –3rd Edition Design wit

  標(biāo)簽： Operational Amplifiers Integrated Circuits

  上傳時(shí)間： 2013-06-12

  上傳用戶：tianjinfan