With the Altera Nios II embedded processor, you as the system designer
can accelerate time-critical software algorithms by adding custom
instructions to the Nios II processor instruction set. Using custom
instructions, you can reduce a complex sequence of standard instructions
to a single instruction implemented in hardware. You can use this feature
for a variety of applications, for example, to optimize software inner
loops for digital signal processing (DSP), packet header processing, and
computation-intensive applications. The Nios II configuration wizard,
part of the Quartus® II software’s SOPC Builder, provides a graphical
user interface (GUI) used to add up to 256 custom instructions to the
Nios II processor
