verilog code which receive from uart RX and then output to lcd text display.
資源簡(jiǎn)介:verilog code which receive from uart RX and then output to lcd text display.
上傳時(shí)間: 2016-03-07
上傳用戶:songrui
資源簡(jiǎn)介:this is the java code which describe the sdes algorithm and help us to encrypt the information
上傳時(shí)間: 2017-05-03
上傳用戶:Breathe0125
資源簡(jiǎn)介:vga verilog codes which design a pong game and output to vga monitor
上傳時(shí)間: 2013-12-31
上傳用戶:牛布牛
資源簡(jiǎn)介:input sever numbers from stdin,and then output them by turn
上傳時(shí)間: 2013-12-20
上傳用戶:yimoney
資源簡(jiǎn)介:capture the image of the inpu object from the user and then detect image edge of the object
上傳時(shí)間: 2017-04-28
上傳用戶:ANRAN
資源簡(jiǎn)介:this is about cryptography. takes text as input and decrypt it and then aagin in plane text
上傳時(shí)間: 2017-06-22
上傳用戶:笨小孩
資源簡(jiǎn)介:universal Serial is for send and receive from serial UART whit AVR
上傳時(shí)間: 2013-12-21
上傳用戶:han_zh
資源簡(jiǎn)介:it is a verilog code written for MELAY state machine based UART and it wll synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device]
上傳時(shí)間: 2013-12-11
上傳用戶:yepeng139
資源簡(jiǎn)介:UART code which tells the function and provide a lab for UART
上傳時(shí)間: 2017-06-01
上傳用戶:思琦琦
資源簡(jiǎn)介:it is a verilog code written for FIFO in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device].you can use this code in any DSP project in which data entry is requir...
上傳時(shí)間: 2014-06-26
上傳用戶:zhuyibin
資源簡(jiǎn)介:We have a group of N items (represented by integers from 1 to N), and we know that there is some total order defined for these items. You may assume that no two elements will be equal (for all a, b: a<b or b<a). However, it is expensive to ...
上傳時(shí)間: 2016-01-17
上傳用戶:jeffery
資源簡(jiǎn)介:verilog code .descrip the risc cpu.download from opencores.org
上傳時(shí)間: 2016-02-20
上傳用戶:frank1234
資源簡(jiǎn)介:ST7920 LCD driver source code, which include the LCD init and output the string to LCD.
上傳時(shí)間: 2016-03-08
上傳用戶:lepoke
資源簡(jiǎn)介:ARM7 UART CODE CONTROL UART 1 and 2
上傳時(shí)間: 2016-03-29
上傳用戶:sqq
資源簡(jiǎn)介:DAC converter design with verilog code and testbench
上傳時(shí)間: 2014-01-23
上傳用戶:yyyyyyyyyy
資源簡(jiǎn)介:winavr code for avr mega8. The program get data from serial port in interrupt function. And then out put the data to 74ls595 (serial to parallel IC) for controlling relay output.
上傳時(shí)間: 2013-12-22
上傳用戶:cjl42111
資源簡(jiǎn)介:vmp is the file generate from Brainvoyager which can link vtc file and the 3D image. This toolbox help you to edit vmp file in matlab.
上傳時(shí)間: 2016-10-04
上傳用戶:stampede
資源簡(jiǎn)介:to use verilog code and c to translate a RGB bmp image(512*512) to a gray level image
上傳時(shí)間: 2014-06-13
上傳用戶:bruce5996
資源簡(jiǎn)介:this is a code which can show data from the outside!
上傳時(shí)間: 2016-12-16
上傳用戶:star_in_rain
資源簡(jiǎn)介:GPS logger and emulator which includes SPI, SD and UART drivers and implements for C51 MCUs
上傳時(shí)間: 2014-01-19
上傳用戶:yyq123456789
資源簡(jiǎn)介:This code takes data received from a bearing and converts it from the time domain to the frequency domain in order to determine bearing defect size.
上傳時(shí)間: 2017-03-11
上傳用戶:sunjet
資源簡(jiǎn)介:it is a verilog code written for MAX1886 ADC interin modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.
上傳時(shí)間: 2017-03-22
上傳用戶:洛木卓
資源簡(jiǎn)介:it is a verilog code written for digital watch in modelsim simulator and it will synthesize in xinlix ise 8.2i.i have tested it om my kit.[i mae my own kit for spartan2 device]
上傳時(shí)間: 2014-01-10
上傳用戶:kernaling
資源簡(jiǎn)介:This is a mutlicore and cluster(of single-core,multi-core systems) matrix inversion code. Which uses the MPI(Message Passing Interface) for communication across the compute nodes of cluster and using thread-API based OpenMP(Open Multi ...
上傳時(shí)間: 2013-12-21
上傳用戶:ryb
資源簡(jiǎn)介:You can download a packet sniffer which grabs packets from local interface and analyses headers. It also writes headers into the log file.
上傳時(shí)間: 2014-01-16
上傳用戶:sk5201314
資源簡(jiǎn)介:UART schematic and code
上傳時(shí)間: 2013-11-29
上傳用戶:dianxin61
資源簡(jiǎn)介:this file contains verilog code of uart file
上傳時(shí)間: 2014-01-27
上傳用戶:lgnf
資源簡(jiǎn)介:this program reads data from sensors and then sends it to a PIC-WEB which then loads it to a server and stores it into a database.
上傳時(shí)間: 2013-12-30
上傳用戶:1101055045
資源簡(jiǎn)介:files describe a example tranmister a txt by uart from host PC and select baud rate
上傳時(shí)間: 2013-12-25
上傳用戶:yangbo69
資源簡(jiǎn)介:this tar includes my code which employ the Lin-Kernighan algorithm to address the tsp problem. this tar also include some testfiles and config file and a readme which describes how to run this program.
上傳時(shí)間: 2014-01-10
上傳用戶:stella2015