?? ch9_3_1.vhd
字號:
************************************
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
--*********************************************
ENTITY Ch9_3_1 is
PORT(
Temp : OUT STD_LOGIC_VECTOR(7 Downto 0);
Din : IN STD_LOGIC_VECTOR(7 Downto 0); -- A/D Data
Dout : OUT STD_LOGIC_VECTOR(3 Downto 0); -- BCD Out
Tout : OUT STD_LOGIC_VECTOR(11 Downto 0); -- BCD Out
SELOUT : OUT STD_LOGIC_VECTOR(2 DOWNTO 0); -- Scan Code
SEGOUT : OUT STD_LOGIC_VECTOR(7 DOWNTO 0); -- SEG7 Display O/P
CP : IN STD_LOGIC; -- CLOCK
RST : IN STD_LOGIC; -- System Reset
nCS,nWR,nRD: OUT STD_LOGIC; -- O/P Signal
nINTR : IN STD_LOGIC -- I/P Signal
);
END Ch9_3_1;
--*********************************************
ARCHITECTURE a OF Ch9_3_1 IS
TYPE STATE_TYPE IS (S0,S1,S2,S3); --State Type Declare
SIGNAL State : STATE_TYPE; --State Signal Declare
SIGNAL EC,nIN : STD_LOGIC; --Synchronous Control & A/D nINTR
SIGNAL D : STD_LOGIC_VECTOR(7 Downto 0); -- Read A/D Data
SIGNAL Value : STd_LOGIC_VECTOR(11 Downto 0);-- A/D Conversion Data
SIGNAL NUM : STD_LOGIC_VECTOR(3 DOWNTO 0); -- Number Display Signal
SIGNAL SEG : STD_LOGIC_VECTOR(6 DOWNTO 0); -- SEG7 Display Signal
SIGNAL SEL : STD_LOGIC_VECTOR(2 DOWNTO 0); -- Select SEG7 Signal
Signal ST : STD_LOGIC_VECTOR(1 DOWNTO 0); -- Scan Code State
BEGIN
SystemConnection: Block
Begin
nIn <= nINTR;
SEGOUT(6 DOWNTO 0) <= SEG; -- Seven Segment Display
SEGOUT(7) <= '0'; -- a Decimal Point ?
Dout <= NUM; -- BCD Number Display
Tout <= Value;
End Block SystemConnection;
StateChange: Block -- Signal Generator
Begin
PROCESS (CP,RST)
BEGIN
IF RST = '1' Then --Reset State
nCS <= '1';
nWR <= '1';
nRD <= '1';
EC <= '0';
State <= S0;
ElsIF CP'Event And CP = '1' Then
CASE State IS
WHEN S0 => --STATE S0 & Write State
nCS <= '0';
nWR <= '0';
nRD <= '1';
EC <= '0';
State <= S1;
WHEN S1 => --STATE S1 & A/D Conversion State
nCS <= '1';
nWR <= '1';
nRD <= '1';
EC <= '0';
If nIN = '0' Then --nINTR = '0' ?
State <= S2;
End if;
WHEN S2 => --STATE S2 & Read State
nCS <= '0';
nWR <= '1';
nRD <= '0';
EC <= '1';
State <= S3;
WHEN S3 => --STATE S3
nCS <= '1';
nWR <= '1';
nRD <= '1';
EC <= '0';
State <= S0;
WHEN OTHERS => --Initial State
State <= S0;
END CASE;
ENd If;
END PROCESS;
End Block StateChange;
ReadData: Block
Begin
PROCESS (CP)
BEGIN
IF CP'Event AND CP = '1' THEN
IF EC = '1' THEN
D <= Din ; --Read A/D Convertor Data
END IF;
END IF;
END PROCESS;
End Block ReadData;
Conversion: Block
Signal V : Std_Logic_Vector(8 downto 0); --A/D Conversion Data
Signal T : Std_Logic_Vector(7 downto 0);
Begin
V <= (D & '0') - "100010001"; -- A/D Data * 2 - (111H)
T <= V(7 Downto 0);
Temp <= T;
Value <= "000000000000" When T = 0 Else
"000000000001" When T = 1 Else
"000000000010" When T = 2 Else
"000000000011" When T = 3 Else
"000000000100" When T = 4 Else
"000000000101" When T = 5 Else
"000000000110" When T = 6 Else
"000000000111" When T = 7 Else
"000000001000" When T = 8 Else
"000000001001" When T = 9 Else
"000000010000" When T = 10 Else
"000000010001" When T = 11 Else
"000000010010" When T = 12 Else
"000000010011" When T = 13 Else
"000000010100" When T = 14 Else
"000000010101" When T = 15 Else
"000000010110" When T = 16 Else
"000000010111" When T = 17 Else
"000000011000" When T = 18 Else
"000000011001" When T = 19 Else
"000000100000" When T = 20 Else
"000000100001" When T = 21 Else
"000000100010" When T = 22 Else
"000000100011" When T = 23 Else
"000000100100" When T = 24 Else
"000000100101" When T = 25 Else
"000000100110" When T = 26 Else
"000000100111" When T = 27 Else
"000000101000" When T = 28 Else
"000000101001" When T = 29 Else
"000000110000" When T = 30 Else
"000000110001" When T = 31 Else
"000000110010" When T = 32 Else
"000000110011" When T = 33 Else
"000000110100" When T = 34 Else
"000000110101" When T = 35 Else
"000000110110" When T = 36 Else
"000000110111" When T = 37 Else
"000000111000" When T = 38 Else
"000000111001" When T = 39 Else
"000001000000" When T = 40 Else
"000001000001" When T = 41 Else
"000001000010" When T = 42 Else
"000001000011" When T = 43 Else
"000001000100" When T = 44 Else
"000001000101" When T = 45 Else
"000001000110" When T = 46 Else
"000001000111" When T = 47 Else
"000001001000" When T = 48 Else
"000001001001" When T = 49 Else
"000001010000" When T = 50 Else
"000001010001" When T = 51 Else
"000001010010" When T = 52 Else
"000001010011" When T = 53 Else
"000001010100" When T = 54 Else
"000001010101" When T = 55 Else
"000001010110" When T = 56 Else
"000001010111" When T = 57 Else
"000001011000" When T = 58 Else
"000001011001" When T = 59 Else
"000001100000" When T = 60 Else
"000001100001" When T = 61 Else
"000001100010" When T = 62 Else
"000001100011" When T = 63 Else
"000001100100" When T = 64 Else
"000001100101" When T = 65 Else
"000001100110" When T = 66 Else
"000001100111" When T = 67 Else
"000001101000" When T = 68 Else
"000001101001" When T = 69 Else
"000001110000" When T = 70 Else
"000001110001" When T = 71 Else
"000001110010" When T = 72 Else
"000001110011" When T = 73 Else
"000001110100" When T = 74 Else
"000001110101" When T = 75 Else
"000001110110" When T = 76 Else
"000001110111" When T = 77 Else
"000001111000" When T = 78 Else
"000001111001" When T = 79 Else
"000010000000" When T = 80 Else
"000010000001" When T = 81 Else
"000010000010" When T = 82 Else
"000010000011" When T = 83 Else
"000010000100" When T = 84 Else
"000010000101" When T = 85 Else
"000010000110" When T = 86 Else
"000010000111" When T = 87 Else
"000010001000" When T = 88 Else
"000010001001" When T = 89 Else
"000010010000" When T = 90 Else
"000010010001" When T = 91 Else
"000010010010" When T = 92 Else
"000010010011" When T = 93 Else
"000010010100" When T = 94 Else
"000010010101" When T = 95 Else
"000010010110" When T = 96 Else
"000010010111" When T = 97 Else
"000010011000" When T = 98 Else
"000010011001" When T = 99 Else
"000100000000"; -- 100
End Block Conversion;
Free_Counter : Block -- 計數器 & 產生掃描信號
Signal Q : STD_LOGIC_VECTOR(15 DOWNTO 0);
Begin
PROCESS (CP) -- 計數器計數
Begin
IF CP'Event AND CP='1' then
Q <= Q+1;
END IF;
END PROCESS;
ST <= Q(15 DOWNTO 14); --about 125 Hz
SELOUT <= "010" WHEN ST=0 ELSE
"001" WHEN ST=1 ELSE
"000" WHEN ST=2 ELSE
"111";
--掃描信號
SEL <= "110" WHEN ST=0 ELSE
"101" WHEN ST=1 ELSE
"011" WHEN ST=2 ELSE
"111";
End Block Free_Counter;
SELECT_BCD : Block
BEGIN -- Select BCD (4 Bits)
NUM <= Value(3 DOWNTO 0) WHEN ST=0 ELSE
Value(7 DOWNTO 4) WHEN ST=1 ELSE
Value(11 DOWNTO 8);
End Block SELECT_BCD;
SEVEN_SEGMENT : Block -- Binary Code -> Segment 7 Code
Begin
--gfedcba
SEG <= "0111111" WHEN NUM = 0 ELSE
"0000110" WHEN NUM = 1 ELSE
"1011011" WHEN NUM = 2 ELSE
"1001111" WHEN NUM = 3 ELSE
"1100110" WHEN NUM = 4 ELSE
"1101101" WHEN NUM = 5 ELSE
"1111101" WHEN NUM = 6 ELSE
"0000111" WHEN NUM = 7 ELSE
"1111111" WHEN NUM = 8 ELSE
"1101111" WHEN NUM = 9 ELSE
"1110111" WHEN NUM = 10 ELSE
"1111100" WHEN NUM = 11 ELSE
"0111001" WHEN NUM = 12 ELSE
"1011110" WHEN NUM = 13 ELSE
"1111001" WHEN NUM = 14 ELSE
"1110001" WHEN NUM = 15 ELSE
"0000000";
End Block SEVEN_SEGMENT;
END a;
-- ********
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