|COUNT_16_7
CLK1 => COUNT_16:u1.CLK
RST1 => COUNT_16:u1.RST
EN1 => COUNT_16:u1.EN
CO[0] <= DECL7S:u2.LED7S[0]
CO[1] <= DECL7S:u2.LED7S[1]
CO[2] <= DECL7S:u2.LED7S[2]
CO[3] <= DECL7S:u2.LED7S[3]
CO[4] <= DECL7S:u2.LED7S[4]
CO[5] <= DECL7S:u2.LED7S[5]
CO[6] <= DECL7S:u2.LED7S[6]
SO <= COUNT_16:u1.COUT


|COUNT_16_7|COUNT_16:u1
CLK => CQI[6].CLK
CLK => CQI[5].CLK
CLK => CQI[4].CLK
CLK => CQI[3].CLK
CLK => CQI[2].CLK
CLK => CQI[1].CLK
CLK => CQI[0].CLK
CLK => CQI[7].CLK
RST => CQI[6].ACLR
RST => CQI[5].ACLR
RST => CQI[4].ACLR
RST => CQI[3].ACLR
RST => CQI[2].ACLR
RST => CQI[1].ACLR
RST => CQI[0].ACLR
RST => CQI[7].ACLR
EN => CQI[6].ENA
EN => CQI[5].ENA
EN => CQI[4].ENA
EN => CQI[3].ENA
EN => CQI[2].ENA
EN => CQI[1].ENA
EN => CQI[0].ENA
EN => CQI[7].ENA
CQ[0] <= CQI[0].DB_MAX_OUTPUT_PORT_TYPE
CQ[1] <= CQI[1].DB_MAX_OUTPUT_PORT_TYPE
CQ[2] <= CQI[2].DB_MAX_OUTPUT_PORT_TYPE
CQ[3] <= CQI[3].DB_MAX_OUTPUT_PORT_TYPE
CQ1[0] <= CQI[4].DB_MAX_OUTPUT_PORT_TYPE
CQ1[1] <= CQI[5].DB_MAX_OUTPUT_PORT_TYPE
CQ1[2] <= CQI[6].DB_MAX_OUTPUT_PORT_TYPE
CQ1[3] <= CQI[7].DB_MAX_OUTPUT_PORT_TYPE
COUT <= reduce_nor~0.DB_MAX_OUTPUT_PORT_TYPE


|COUNT_16_7|DECL7S:u2
A[0] => Mux~0.IN19
A[0] => Mux~1.IN19
A[0] => Mux~2.IN19
A[0] => Mux~3.IN19
A[0] => Mux~4.IN19
A[0] => Mux~5.IN19
A[0] => Mux~6.IN19
A[1] => Mux~0.IN18
A[1] => Mux~1.IN18
A[1] => Mux~2.IN18
A[1] => Mux~3.IN18
A[1] => Mux~4.IN18
A[1] => Mux~5.IN18
A[1] => Mux~6.IN18
A[2] => Mux~0.IN17
A[2] => Mux~1.IN17
A[2] => Mux~2.IN17
A[2] => Mux~3.IN17
A[2] => Mux~4.IN17
A[2] => Mux~5.IN17
A[2] => Mux~6.IN17
A[3] => Mux~0.IN16
A[3] => Mux~1.IN16
A[3] => Mux~2.IN16
A[3] => Mux~3.IN16
A[3] => Mux~4.IN16
A[3] => Mux~5.IN16
A[3] => Mux~6.IN16
LED7S[0] <= Mux~6.DB_MAX_OUTPUT_PORT_TYPE
LED7S[1] <= Mux~5.DB_MAX_OUTPUT_PORT_TYPE
LED7S[2] <= Mux~4.DB_MAX_OUTPUT_PORT_TYPE
LED7S[3] <= Mux~3.DB_MAX_OUTPUT_PORT_TYPE
LED7S[4] <= Mux~2.DB_MAX_OUTPUT_PORT_TYPE
LED7S[5] <= Mux~1.DB_MAX_OUTPUT_PORT_TYPE
LED7S[6] <= Mux~0.DB_MAX_OUTPUT_PORT_TYPE