{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.0 Build 190 1/28/2004 SJ Full Version " "Info: Version 4.0 Build 190 1/28/2004 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Thu Nov 24 16:58:21 2005 " "Info: Processing started: Thu Nov 24 16:58:21 2005" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --import_settings_files=on --export_settings_files=off COUNT_16_7 -c COUNT_16_7 " "Info: Command: quartus_map --import_settings_files=on --export_settings_files=off COUNT_16_7 -c COUNT_16_7" {  } {  } 0}
{ "Warning" "WSGN_FILE_IS_MISSING" "C:/Documents and Settings/鄭崢/jsj/桌面/ASDF/COUNT_16_7.vhd " "Warning: Can't analyze file -- file C:/Documents and Settings/鄭崢/jsj/桌面/ASDF/COUNT_16_7.vhd is missing" {  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "COUNT_16.vhd 2 1 " "Info: Found 2 design units and 1 entities in source file COUNT_16.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 COUNT_16-AAA " "Info: Found design unit 1: COUNT_16-AAA" {  } { { "C:/Documents and Settings/鄭崢/桌面/COUNT_100/復件 ASDF/復件 ASDF/COUNT_16.vhd" "COUNT_16-AAA" "" { Text "C:/Documents and Settings/鄭崢/桌面/COUNT_100/復件 ASDF/復件 ASDF/COUNT_16.vhd" 10 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 COUNT_16 " "Info: Found entity 1: COUNT_16" {  } { { "C:/Documents and Settings/鄭崢/桌面/COUNT_100/復件 ASDF/復件 ASDF/COUNT_16.vhd" "COUNT_16" "" { Text "C:/Documents and Settings/鄭崢/桌面/COUNT_100/復件 ASDF/復件 ASDF/COUNT_16.vhd" 4 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "DECL7S .vhd 2 1 " "Info: Found 2 design units and 1 entities in source file DECL7S .vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 DECL7S-ONE " "Info: Found design unit 1: DECL7S-ONE" {  } { { "C:/Documents and Settings/鄭崢/桌面/COUNT_100/復件 ASDF/復件 ASDF/DECL7S .vhd" "DECL7S-ONE" "" { Text "C:/Documents and Settings/鄭崢/桌面/COUNT_100/復件 ASDF/復件 ASDF/DECL7S .vhd" 7 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 DECL7S " "Info: Found entity 1: DECL7S" {  } { { "C:/Documents and Settings/鄭崢/桌面/COUNT_100/復件 ASDF/復件 ASDF/DECL7S .vhd" "DECL7S" "" { Text "C:/Documents and Settings/鄭崢/桌面/COUNT_100/復件 ASDF/復件 ASDF/DECL7S .vhd" 3 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_SEARCH_FILE" "COUNT_16_7.vhd 2 1 " "Info: Using design file COUNT_16_7.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 COUNT_16_7-ONE " "Info: Found design unit 1: COUNT_16_7-ONE" {  } { { "C:/Documents and Settings/鄭崢/桌面/COUNT_100/復件 ASDF/復件 ASDF/COUNT_16_7.vhd" "COUNT_16_7-ONE" "" { Text "C:/Documents and Settings/鄭崢/桌面/COUNT_100/復件 ASDF/復件 ASDF/COUNT_16_7.vhd" 10 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 COUNT_16_7 " "Info: Found entity 1: COUNT_16_7" {  } { { "C:/Documents and Settings/鄭崢/桌面/COUNT_100/復件 ASDF/復件 ASDF/COUNT_16_7.vhd" "COUNT_16_7" "" { Text "C:/Documents and Settings/鄭崢/桌面/COUNT_100/復件 ASDF/復件 ASDF/COUNT_16_7.vhd" 4 -1 0 } }  } 0}  } {  } 0}
{ "Info" "IVRFX_VHDL_CASE_STATEMENT_OTHERS_CLAUSE_NEVER_SELECTED" "DECL7S .vhd(28) " "Info: VHDL Case Statement information at DECL7S .vhd(28): OTHERS choice is never selected" {  } { { "C:/Documents and Settings/鄭崢/桌面/復件 ASDF/復件 ASDF/DECL7S .vhd" "" "" { Text "C:/Documents and Settings/鄭崢/桌面/復件 ASDF/復件 ASDF/DECL7S .vhd" 28 0 0 } }  } 0}
{ "Info" "IOPT_INFERENCING_SUMMARY" "1 " "Info: Inferred 1 megafunctions from design logic" { { "Info" "IOPT_LPM_COUNTER_INFERRED" "COUNT_16:u1\|CQI\[0\]~0 8 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=8) from the following logic: COUNT_16:u1\|CQI\[0\]~0" {  } { { "C:/Documents and Settings/鄭崢/桌面/COUNT_100/復件 ASDF/復件 ASDF/COUNT_16.vhd" "" "CQI\[0\]~0" { Text "C:/Documents and Settings/鄭崢/桌面/COUNT_100/復件 ASDF/復件 ASDF/COUNT_16.vhd" 15 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "f:/quartus/libraries/megafunctions/lpm_counter.tdf 1 1 " "Info: Found 1 design units and 1 entities in source file f:/quartus/libraries/megafunctions/lpm_counter.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter " "Info: Found entity 1: lpm_counter" {  } { { "f:/quartus/libraries/megafunctions/lpm_counter.tdf" "lpm_counter" "" { Text "f:/quartus/libraries/megafunctions/lpm_counter.tdf" 221 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "f:/quartus/libraries/megafunctions/alt_counter_stratix.tdf 1 1 " "Info: Found 1 design units and 1 entities in source file f:/quartus/libraries/megafunctions/alt_counter_stratix.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 alt_counter_stratix " "Info: Found entity 1: alt_counter_stratix" {  } { { "f:/quartus/libraries/megafunctions/alt_counter_stratix.tdf" "alt_counter_stratix" "" { Text "f:/quartus/libraries/megafunctions/alt_counter_stratix.tdf" 282 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "45 " "Info: Implemented 45 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "3 " "Info: Implemented 3 input pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_OPINS" "15 " "Info: Implemented 15 output pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_LCELLS" "27 " "Info: Implemented 27 logic cells" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 1  " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Thu Nov 24 16:58:24 2005 " "Info: Processing ended: Thu Nov 24 16:58:24 2005" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 0}