--
-- VHDL Package Body work.synth_pack
--
-- Created:
--          by - mrmayer.UNKNOWN (eeultra11.ee.umr.edu)
--          at - 11:13:10 03/18/98
--
-- Generated by Mentor Graphics' Renoir(TM) 3.0 (Build 110)
--
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;

package body synth_pack is
 

   ------------------------------------------------------------------------
   FUNCTION to_high_imped(arg : bvec) RETURN bvec IS
       VARIABLE result : bvec;
   BEGIN
       FOR k in arg'RANGE LOOP
           CASE arg(k) IS
               WHEN '0' => result(k) := 'L';
               WHEN '1' => result(k) := 'H';
               WHEN 'L' => result(k) := 'L';
               WHEN 'H' => result(k) := 'H';
               WHEN OTHERS => result(k) := 'Z';
           END CASE;
       END LOOP;
       RETURN(result);
   END FUNCTION to_high_imped;
 
   ------------------------------------------------------------------------
 
   
end synth_pack;