?? switch.fit
字號:
-- MAX+plus II Compiler Fit File
-- Version 10.0 9/14/2000
-- Compiled: 03/16/2004 02:05:16
-- Copyright (C) 1988-2000 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
CHIP "switch"
BEGIN
DEVICE = "EPM7032LC44-6";
"s_clk" : INPUT_PIN = 43 ;
"s_sw" : INPUT_PIN = 4 ; -- LC1
"s_change" : OUTPUT_PIN = 40 ; -- LC18
"s_diswork" : OUTPUT_PIN = 41 ; -- LC17
END;
INTERNAL_INFO "switch"
BEGIN
DEVICE = EPM7032LC44-6;
LC17 : LORAX = "G13R0,PA7R0C1";
LC18 : LORAX = "G14R0";
OH0R0P4 : LORAX = "G43R0,PA20R0C1";
END;
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