vendor_name = ModelSim
source_file = 1, E:/altera/wiretx/agc/agc.v
source_file = 1, E:/altera/wiretx/agc/mymult.qip
source_file = 1, E:/altera/wiretx/agc/mymult.v
source_file = 1, E:/altera/wiretx/agc/db/agc.cbx.xml
source_file = 1, e:/altera/10.0sp1/quartus/libraries/megafunctions/lpm_add_sub.tdf
source_file = 1, e:/altera/10.0sp1/quartus/libraries/megafunctions/addcore.inc
source_file = 1, e:/altera/10.0sp1/quartus/libraries/megafunctions/look_add.inc
source_file = 1, e:/altera/10.0sp1/quartus/libraries/megafunctions/bypassff.inc
source_file = 1, e:/altera/10.0sp1/quartus/libraries/megafunctions/altshift.inc
source_file = 1, e:/altera/10.0sp1/quartus/libraries/megafunctions/alt_stratix_add_sub.inc
source_file = 1, e:/altera/10.0sp1/quartus/libraries/megafunctions/aglobal100.inc
source_file = 1, e:/altera/10.0sp1/quartus/libraries/megafunctions/cbx.lst
source_file = 1, E:/altera/wiretx/agc/db/add_sub_hge.tdf
source_file = 1, E:/altera/wiretx/agc/db/add_sub_68c.tdf
source_file = 1, E:/altera/wiretx/agc/db/add_sub_pkg.tdf
source_file = 1, E:/altera/wiretx/agc/db/add_sub_itb.tdf
source_file = 1, e:/altera/10.0sp1/quartus/libraries/megafunctions/lpm_mult.tdf
source_file = 1, e:/altera/10.0sp1/quartus/libraries/megafunctions/lpm_add_sub.inc
source_file = 1, e:/altera/10.0sp1/quartus/libraries/megafunctions/multcore.inc
source_file = 1, E:/altera/wiretx/agc/db/mult_1ks.tdf
design_name = agc
instance = comp, \LessThan0~0 , LessThan0~0, agc, 1
instance = comp, \LessThan0~1 , LessThan0~1, agc, 1
instance = comp, \LessThan0~2 , LessThan0~2, agc, 1
instance = comp, \LessThan0~3 , LessThan0~3, agc, 1
instance = comp, \power[0]~output , power[0]~output, agc, 1
instance = comp, \power[1]~output , power[1]~output, agc, 1
instance = comp, \power[2]~output , power[2]~output, agc, 1
instance = comp, \power[3]~output , power[3]~output, agc, 1
instance = comp, \power[4]~output , power[4]~output, agc, 1
instance = comp, \power[5]~output , power[5]~output, agc, 1
instance = comp, \power[6]~output , power[6]~output, agc, 1
instance = comp, \power[7]~output , power[7]~output, agc, 1
instance = comp, \power[8]~output , power[8]~output, agc, 1
instance = comp, \power[9]~output , power[9]~output, agc, 1
instance = comp, \power[10]~output , power[10]~output, agc, 1
instance = comp, \power[11]~output , power[11]~output, agc, 1
instance = comp, \power[12]~output , power[12]~output, agc, 1
instance = comp, \power[13]~output , power[13]~output, agc, 1
instance = comp, \power[14]~output , power[14]~output, agc, 1
instance = comp, \power[15]~output , power[15]~output, agc, 1
instance = comp, \power[16]~output , power[16]~output, agc, 1
instance = comp, \power[17]~output , power[17]~output, agc, 1
instance = comp, \power[18]~output , power[18]~output, agc, 1
instance = comp, \power[19]~output , power[19]~output, agc, 1
instance = comp, \power[20]~output , power[20]~output, agc, 1
instance = comp, \power[21]~output , power[21]~output, agc, 1
instance = comp, \power[22]~output , power[22]~output, agc, 1
instance = comp, \power[23]~output , power[23]~output, agc, 1
instance = comp, \power[24]~output , power[24]~output, agc, 1
instance = comp, \power[25]~output , power[25]~output, agc, 1
instance = comp, \power[26]~output , power[26]~output, agc, 1
instance = comp, \power[27]~output , power[27]~output, agc, 1
instance = comp, \power[28]~output , power[28]~output, agc, 1
instance = comp, \power[29]~output , power[29]~output, agc, 1
instance = comp, \power[30]~output , power[30]~output, agc, 1
instance = comp, \power[31]~output , power[31]~output, agc, 1
instance = comp, \power[32]~output , power[32]~output, agc, 1
instance = comp, \power[33]~output , power[33]~output, agc, 1
instance = comp, \power[34]~output , power[34]~output, agc, 1
instance = comp, \power[35]~output , power[35]~output, agc, 1
instance = comp, \power[36]~output , power[36]~output, agc, 1
instance = comp, \y_out[0]~output , y_out[0]~output, agc, 1
instance = comp, \y_out[1]~output , y_out[1]~output, agc, 1
instance = comp, \y_out[2]~output , y_out[2]~output, agc, 1
instance = comp, \y_out[3]~output , y_out[3]~output, agc, 1
instance = comp, \y_out[4]~output , y_out[4]~output, agc, 1
instance = comp, \y_out[5]~output , y_out[5]~output, agc, 1
instance = comp, \y_out[6]~output , y_out[6]~output, agc, 1
instance = comp, \y_out[7]~output , y_out[7]~output, agc, 1
instance = comp, \y_out[8]~output , y_out[8]~output, agc, 1
instance = comp, \y_out[9]~output , y_out[9]~output, agc, 1
instance = comp, \y_out[10]~output , y_out[10]~output, agc, 1
instance = comp, \y_out[11]~output , y_out[11]~output, agc, 1
instance = comp, \y_out[12]~output , y_out[12]~output, agc, 1
instance = comp, \y_out[13]~output , y_out[13]~output, agc, 1
instance = comp, \y_out[14]~output , y_out[14]~output, agc, 1
instance = comp, \y_out[15]~output , y_out[15]~output, agc, 1
instance = comp, \rst~input , rst~input, agc, 1
instance = comp, \rst~inputclkctrl , rst~inputclkctrl, agc, 1
instance = comp, \cnt[0]~5 , cnt[0]~5, agc, 1
instance = comp, \Add0~2 , Add0~2, agc, 1
instance = comp, \Add0~6 , Add0~6, agc, 1
instance = comp, \Add0~10 , Add0~10, agc, 1
instance = comp, \Add0~14 , Add0~14, agc, 1
instance = comp, \Add0~18 , Add0~18, agc, 1
instance = comp, \cnt[5]~6 , cnt[5]~6, agc, 1
instance = comp, \Equal0~0 , Equal0~0, agc, 1
instance = comp, \x_power1~0 , x_power1~0, agc, 1
instance = comp, \x_power1[0] , x_power1[0], agc, 1
instance = comp, \Equal0~0clkctrl , Equal0~0clkctrl, agc, 1
instance = comp, \x_power[0] , x_power[0], agc, 1
instance = comp, \x_power1~1 , x_power1~1, agc, 1
instance = comp, \x_power1[1] , x_power1[1], agc, 1
instance = comp, \x_power[1] , x_power[1], agc, 1
instance = comp, \x_power1~2 , x_power1~2, agc, 1
instance = comp, \x_power1[2] , x_power1[2], agc, 1
instance = comp, \x_power[2] , x_power[2], agc, 1
instance = comp, \x_power1~3 , x_power1~3, agc, 1
instance = comp, \x_power1[3] , x_power1[3], agc, 1
instance = comp, \x_power[3] , x_power[3], agc, 1
instance = comp, \x_power1~4 , x_power1~4, agc, 1
instance = comp, \x_power1[4] , x_power1[4], agc, 1
instance = comp, \x_power[4] , x_power[4], agc, 1
instance = comp, \x_power1~5 , x_power1~5, agc, 1
instance = comp, \x_power1[5] , x_power1[5], agc, 1
instance = comp, \x_power[5] , x_power[5], agc, 1
instance = comp, \x_power1~6 , x_power1~6, agc, 1
instance = comp, \x_power1[6] , x_power1[6], agc, 1
instance = comp, \x_power[6] , x_power[6], agc, 1
instance = comp, \x_power1~7 , x_power1~7, agc, 1
instance = comp, \x_power1[7] , x_power1[7], agc, 1
instance = comp, \x_power[7] , x_power[7], agc, 1
instance = comp, \x_power1~8 , x_power1~8, agc, 1
instance = comp, \x_power1[8] , x_power1[8], agc, 1
instance = comp, \x_power[8] , x_power[8], agc, 1
instance = comp, \x_power1~9 , x_power1~9, agc, 1
instance = comp, \x_power1[9] , x_power1[9], agc, 1
instance = comp, \x_power[9] , x_power[9], agc, 1
instance = comp, \x_power1~10 , x_power1~10, agc, 1
instance = comp, \x_power1[10] , x_power1[10], agc, 1
instance = comp, \x_power[10] , x_power[10], agc, 1
instance = comp, \x_power1~11 , x_power1~11, agc, 1
instance = comp, \x_power1[11] , x_power1[11], agc, 1
instance = comp, \x_power[11] , x_power[11], agc, 1
instance = comp, \x_power1~12 , x_power1~12, agc, 1
instance = comp, \x_power1[12] , x_power1[12], agc, 1
instance = comp, \x_power[12] , x_power[12], agc, 1
instance = comp, \x_power1~13 , x_power1~13, agc, 1
instance = comp, \x_power1[13] , x_power1[13], agc, 1
instance = comp, \x_power[13] , x_power[13], agc, 1
instance = comp, \x_power1~14 , x_power1~14, agc, 1
instance = comp, \x_power1[14] , x_power1[14], agc, 1
instance = comp, \x_power[14] , x_power[14], agc, 1
instance = comp, \x_power1~15 , x_power1~15, agc, 1
instance = comp, \x_power1[15] , x_power1[15], agc, 1
instance = comp, \x_power[15] , x_power[15], agc, 1
instance = comp, \x_power1~16 , x_power1~16, agc, 1
instance = comp, \x_power1[16] , x_power1[16], agc, 1
instance = comp, \x_power[16] , x_power[16], agc, 1
instance = comp, \x_power1~17 , x_power1~17, agc, 1
instance = comp, \x_power1[17] , x_power1[17], agc, 1
instance = comp, \x_power[17] , x_power[17], agc, 1
instance = comp, \x_power1~18 , x_power1~18, agc, 1
instance = comp, \x_power1[18] , x_power1[18], agc, 1
instance = comp, \x_power[18] , x_power[18], agc, 1
instance = comp, \x_power1~19 , x_power1~19, agc, 1
instance = comp, \x_power1[19] , x_power1[19], agc, 1
instance = comp, \x_power[19] , x_power[19], agc, 1
instance = comp, \x_power1~20 , x_power1~20, agc, 1
instance = comp, \x_power1[20] , x_power1[20], agc, 1
instance = comp, \x_power[20] , x_power[20], agc, 1
instance = comp, \x_power1~21 , x_power1~21, agc, 1
instance = comp, \x_power1[21] , x_power1[21], agc, 1
instance = comp, \x_power[21] , x_power[21], agc, 1
instance = comp, \x_power1~22 , x_power1~22, agc, 1
instance = comp, \x_power1[22] , x_power1[22], agc, 1
instance = comp, \x_power[22] , x_power[22], agc, 1
instance = comp, \x_power1~23 , x_power1~23, agc, 1
instance = comp, \x_power1[23] , x_power1[23], agc, 1
instance = comp, \x_power[23] , x_power[23], agc, 1
instance = comp, \x_power1~24 , x_power1~24, agc, 1
instance = comp, \x_power1[24] , x_power1[24], agc, 1
instance = comp, \x_power[24] , x_power[24], agc, 1
instance = comp, \x_power1~25 , x_power1~25, agc, 1
instance = comp, \x_power1[25] , x_power1[25], agc, 1
instance = comp, \x_power[25] , x_power[25], agc, 1
instance = comp, \x_power1~26 , x_power1~26, agc, 1
instance = comp, \x_power1[26] , x_power1[26], agc, 1
instance = comp, \x_power[26] , x_power[26], agc, 1
instance = comp, \x_power1~27 , x_power1~27, agc, 1
instance = comp, \x_power1[27] , x_power1[27], agc, 1
instance = comp, \x_power[27] , x_power[27], agc, 1
instance = comp, \x_power1~28 , x_power1~28, agc, 1
instance = comp, \x_power1[28] , x_power1[28], agc, 1
instance = comp, \x_power[28] , x_power[28], agc, 1
instance = comp, \x_power1~29 , x_power1~29, agc, 1
instance = comp, \x_power1[29] , x_power1[29], agc, 1
instance = comp, \x_power[29] , x_power[29], agc, 1
instance = comp, \x_power1~30 , x_power1~30, agc, 1
instance = comp, \x_power1[30] , x_power1[30], agc, 1
instance = comp, \x_power[30] , x_power[30], agc, 1
instance = comp, \x_power1~31 , x_power1~31, agc, 1
instance = comp, \x_power1[31] , x_power1[31], agc, 1
instance = comp, \x_power[31] , x_power[31], agc, 1
instance = comp, \x_power1~32 , x_power1~32, agc, 1
instance = comp, \x_power1[32] , x_power1[32], agc, 1
instance = comp, \x_power[32] , x_power[32], agc, 1
instance = comp, \x_power1~33 , x_power1~33, agc, 1
instance = comp, \x_power1[33] , x_power1[33], agc, 1
instance = comp, \x_power[33] , x_power[33], agc, 1
instance = comp, \x_power1~34 , x_power1~34, agc, 1
instance = comp, \x_power1[34] , x_power1[34], agc, 1
instance = comp, \x_power[34] , x_power[34], agc, 1
instance = comp, \x_power1~35 , x_power1~35, agc, 1
instance = comp, \x_power1[35] , x_power1[35], agc, 1
instance = comp, \x_power[35] , x_power[35], agc, 1
instance = comp, \x_power1~36 , x_power1~36, agc, 1
instance = comp, \x_power1[36] , x_power1[36], agc, 1
instance = comp, \x_power[36] , x_power[36], agc, 1
instance = comp, \x_in[1]~input , x_in[1]~input, agc, 1
instance = comp, \LessThan0~5 , LessThan0~5, agc, 1
instance = comp, \LessThan0~6 , LessThan0~6, agc, 1
instance = comp, \LessThan0~4 , LessThan0~4, agc, 1
instance = comp, \LessThan0~7 , LessThan0~7, agc, 1
instance = comp, \LessThan0~8 , LessThan0~8, agc, 1
instance = comp, \y_out~0 , y_out~0, agc, 1
instance = comp, \x_in[2]~input , x_in[2]~input, agc, 1
instance = comp, \x_in[0]~input , x_in[0]~input, agc, 1
instance = comp, \y_out~1 , y_out~1, agc, 1
instance = comp, \x_in[3]~input , x_in[3]~input, agc, 1
instance = comp, \y_out~2 , y_out~2, agc, 1
instance = comp, \x_in[4]~input , x_in[4]~input, agc, 1
instance = comp, \y_out~3 , y_out~3, agc, 1
instance = comp, \x_in[5]~input , x_in[5]~input, agc, 1
instance = comp, \y_out~4 , y_out~4, agc, 1
instance = comp, \x_in[6]~input , x_in[6]~input, agc, 1
instance = comp, \y_out~5 , y_out~5, agc, 1
instance = comp, \x_in[7]~input , x_in[7]~input, agc, 1
instance = comp, \y_out~6 , y_out~6, agc, 1
instance = comp, \x_in[8]~input , x_in[8]~input, agc, 1
instance = comp, \y_out~7 , y_out~7, agc, 1
instance = comp, \x_in[9]~input , x_in[9]~input, agc, 1
instance = comp, \y_out~8 , y_out~8, agc, 1
instance = comp, \x_in[10]~input , x_in[10]~input, agc, 1
instance = comp, \y_out~9 , y_out~9, agc, 1
instance = comp, \x_in[11]~input , x_in[11]~input, agc, 1
instance = comp, \y_out~10 , y_out~10, agc, 1
instance = comp, \x_in[12]~input , x_in[12]~input, agc, 1
instance = comp, \y_out~11 , y_out~11, agc, 1
instance = comp, \x_in[13]~input , x_in[13]~input, agc, 1
instance = comp, \y_out~12 , y_out~12, agc, 1
instance = comp, \x_in[14]~input , x_in[14]~input, agc, 1
instance = comp, \y_out~13 , y_out~13, agc, 1
instance = comp, \x_in[15]~input , x_in[15]~input, agc, 1
instance = comp, \y_out~14 , y_out~14, agc, 1
instance = comp, \y_out~15 , y_out~15, agc, 1
instance = comp, \clk~input , clk~input, agc, 1