//led_top led_top_inst(
//    .seg    ( seg   ),    
//    .clk    ( clk   ),
//    .rst_n  ( rst_n ), 
//    .data   ( data  ),
//    .dot    ( dot)
//    );


module led_top(
    seg,    
    clk,
    rst_n, // synthesis attribute clock_buffer of rst_n is ibufg;
    data,
    dot
    );

input               clk;
input               rst_n; 
input   [15:0]      data;
input   [3 :0]      dot;
output  [11:0]      seg ;

wire    [6 :0]      led ;
wire    [4 :0]      segcode;
wire    [3 :0]      hex;
  dynamic_hex dynamic_hex_inst(
    .hex    (hex),
    .segcode(segcode),
    
    .clk    (clk    ),
    .rst_n  (rst_n  ),
    .data   (data   ),
    .dot    (dot    )
    );

  hex2led_common_cathode hex2led_inst (
    .hex(hex), 
    .led(led)
    ) ;            
                
  led2seg led2seg_inst(
    .seg    (seg),
    .led    (led),
    .segcode(segcode) 
    );

endmodule