/* =============================================================================

  filename:	F2812.h

  Description:	TMS320F281X register definitions for c
  
=============================================================================== */

#ifndef _F2812_h
#define _F2812_h

/*======================     PLL, Clocking, Watchdog, and Low-Power Mode Registers  =====================*/
/*      reserved 0x00 7010 ~ 0x00 7017   8   */
/*      reserved 0x00 7018               1   */
/*      reserved 0x00 7019               1   */
#define	HISPCP  *((volatile unsigned int *)0x00701A)   /* 1 High-Speed Peripheral Clock Prescaler Register for HSPCLK clock */
#define	LOSPCP  *((volatile unsigned int *)0x00701B)   /* 1 Low-Speed Peripheral Clock Prescaler Register for LSPCLK clock */
#define	PCLKCR  *((volatile unsigned int *)0x00701C)   /* 1 Peripheral Clock Control Register */

/*      reserved 0x00 701D               1   */

#define	LPMCR0  *((volatile unsigned int *)0x00701E)   /* 1 Low Power Mode Control Register 0 */
#define	LPMCR1  *((volatile unsigned int *)0x00701F)   /* 1 Low Power Mode Control Register 1 */

/*      reserved 0x00 7020               1   */

#define	PLLCR   *((volatile unsigned int *)0x007021)   /* 1 PLL Control Register    */
#define	SCSR    *((volatile unsigned int *)0x007022)   /* 1 System Control & Status Register */
#define	WDCNTR  *((volatile unsigned int *)0x007023)   /* 1 Watchdog Counter Register */

/*       reserved 0x00 7024              1   */

#define	WDKEY   *((volatile unsigned int *)0x007025)   /* 1 Watchdog Reset Key Register */

/*       reserved 0x00 7026 ~ 0x00 7028  3   */

#define	WDCR    *((volatile unsigned int *)0x007029)   /* 1 Watchdog Control Register */

/*       reserved 0x00 702A ~ 0x00 702F  6   */



/*=================   Flash/OTP Configuration Registers =======================*/

#define	FOPT        *((volatile unsigned int *)0x00000A80)  /* Flash Option Register   */

/*     0x00000A81  Reserved    */

#define	FPWR        *((volatile unsigned int *)0x00000A82)  /* Flash Power Modes Register  */
#define	FSTATUS     *((volatile unsigned int *)0x00000A83)  /* Status Register   */
#define	FSTDBYWAIT  *((volatile unsigned int *)0x00000A84)  /* Flash Sleep To Standby Wait State Register  */
#define	FACTIVEWAIT *((volatile unsigned int *)0x00000A85)  /* Flash Standby To Active Wait State Register */
#define	FBANKWAIT   *((volatile unsigned int *)0x00000A86)  /* Flash Read Access Wait State Register     */
#define	FOTPWAIT    *((volatile unsigned int *)0x00000A87)  /* OTP Read Access Wait State Register  */


/*=============   Code Security Module (CSM) Registers    ================================*/
/*          KEY Registers – Accessible by the user        */

#define	KEY0   *((volatile unsigned int *)0x00000AE0)  /*  Low word of the 128-bit KEY register,Reset Values: 0xFFFF */
#define	KEY1   *((volatile unsigned int *)0x00000AE1)  /*  word of the 128-bit KEY register,Reset Values: 0xFFFF  */
#define	KEY2   *((volatile unsigned int *)0x00000AE2)  /*  word of the 128-bit KEY register,Reset Values: 0xFFFF  */
#define	KEY3   *((volatile unsigned int *)0x00000AE3)  /*  word of the 128-bit KEY register,Reset Values: 0xFFFF  */
#define	KEY4   *((volatile unsigned int *)0x00000AE4)  /*  word of the 128-bit KEY register,Reset Values: 0xFFFF  */
#define	KEY5   *((volatile unsigned int *)0x00000AE5)  /*  word of the 128-bit KEY register,Reset Values: 0xFFFF  */
#define	KEY6   *((volatile unsigned int *)0x00000AE6)  /*  word of the 128-bit KEY register,Reset Values: 0xFFFF  */
#define	KEY7   *((volatile unsigned int *)0x00000AE7)  /*  High word of the 128-bit KEY register,Reset Values: 0xFFFF  */

#define	CSMSCR *((volatile unsigned int *)0x00000AEF)  /*  CSM status and control register  */



/*=========   PIE Configurations and Control Register Mappings     ================*/

#define	PIECTRL   *((volatile unsigned int *)0x000CE0)   /*  Control Register   */
#define PIEACK    *((volatile unsigned int *)0x000CE1)   /*  Acknowledge Register  */
#define PIEIER1   *((volatile unsigned int *)0x000CE2)   /*  1 PIE, INT1 Group Enable Register  */
#define PIEIFR1   *((volatile unsigned int *)0x000CE3)   /*  1 PIE, INT1 Group Flag Register  */
#define PIEIER2   *((volatile unsigned int *)0x000CE4)   /* 1 PIE, INT2 Group Enable Register  */
#define PIEIFR2   *((volatile unsigned int *)0x000CE5)   /* 1 PIE, INT2 Group Flag Register  */
#define PIEIER3   *((volatile unsigned int *)0x000CE6)   /* 1 PIE, INT3 Group Enable Register  */
#define PIEIFR3   *((volatile unsigned int *)0x000CE7)   /* 1 PIE, INT3 Group Flag Register   */
#define PIEIER4   *((volatile unsigned int *)0x000CE8)   /*  1 PIE, INT4 Group Enable Register  */
#define PIEIFR4   *((volatile unsigned int *)0x000CE9)   /*  1 PIE, INT4 Group Flag Register   */
#define PIEIER5   *((volatile unsigned int *)0x000CEA)   /*  1 PIE, INT5 Group Enable Register  */
#define PIEIFR5   *((volatile unsigned int *)0x000CEB)   /*  1 PIE, INT5 Group Flag Register  */
#define PIEIER6   *((volatile unsigned int *)0x000CEC)   /*  1 PIE, INT6 Group Enable Register  */
#define PIEIFR6   *((volatile unsigned int *)0x000CED)   /*  1 PIE, INT6 Group Flag Register  */
#define PIEIER7   *((volatile unsigned int *)0x000CEE)   /*  1 PIE, INT7 Group Enable Register  */
#define PIEIFR7   *((volatile unsigned int *)0x000CEF)   /*  1 PIE, INT7 Group Flag Register  */
#define PIEIER8   *((volatile unsigned int *)0x000CF0)   /*  1 PIE, INT8 Group Enable Register */
#define PIEIFR8   *((volatile unsigned int *)0x000CF1)   /*  1 PIE, INT8 Group Flag Register  */
#define PIEIER9   *((volatile unsigned int *)0x000CF2)   /*  1 PIE, INT9 Group Enable Register  */
#define PIEIFR9   *((volatile unsigned int *)0x000CF3)   /*  1 PIE, INT9 Group Flag Register  */
#define PIEIER10  *((volatile unsigned int *)0x000CF4)   /*  1 PIE, INT10 Group Enable Register  */
#define PIEIFR10  *((volatile unsigned int *)0x000CF5)   /*  1 PIE, INT10 Group Flag Register  */
#define PIEIER11  *((volatile unsigned int *)0x000CF6)   /*  1 PIE, INT11 Group Enable Register  */
#define PIEIFR11  *((volatile unsigned int *)0x000CF7)   /*  1 PIE, INT11 Group Flag Register   */
#define PIEIER12  *((volatile unsigned int *)0x000CF8)   /*  1 PIE, INT12 Group Enable Register  */
#define PIEIFR12  *((volatile unsigned int *)0x000CF9)   /*  1 PIE, INT12 Group Flag Register  */

  /*   0x000CFA ~ 0x000CFF 6 Words reserved  */

/*=========================   PIE Interrupt Vector  ==========================================*/
/*   0x000D00 ~ 0x000d18 reserved , no used            */
typedef interrupt void(*PINT)(void);

#define Reserved1_ISR    *((volatile unsigned long *)0x000D00)   /* reserved  */
#define Reserved2_ISR    *((volatile unsigned long *)0x000D02)   /* reserved  */
#define Reserved3_ISR    *((volatile unsigned long *)0x000D04)   /* reserved  */
#define Reserved4_ISR    *((volatile unsigned long *)0x000D06)   /* reserved  */
#define Reserved5_ISR    *((volatile unsigned long *)0x000D08)   /* reserved  */
#define Reserved6_ISR    *((volatile unsigned long *)0x000D0A)   /* reserved  */
#define Reserved7_ISR    *((volatile unsigned long *)0x000D0C)   /* reserved  */
#define Reserved8_ISR    *((volatile unsigned long *)0x000D0E)   /* reserved  */
#define Reserved9_ISR    *((volatile unsigned long *)0x000D10)   /* reserved  */
#define Reserved10_ISR   *((volatile unsigned long *)0x000D12)   /* reserved  */
#define Reserved11_ISR   *((volatile unsigned long *)0x000D14)   /* reserved  */
#define Reserved12_ISR   *((volatile unsigned long *)0x000D16)   /* reserved  */
#define Reserved13_ISR   *((volatile unsigned long *)0x000D18)   /* reserved  */


#define INT13_ISR    *((volatile unsigned long *)0x000D1A)   /* XINT13 or CPU-Timer 1   */
#define INT14_ISR    *((volatile unsigned long *)0x000D1C)   /* CPU-Timer2              */
#define DATALOG_ISR  *((volatile unsigned long *)0x000D1E)   /* Datalogging interrupt   */
#define RTOSINT_ISR  *((volatile unsigned long *)0x000D20)   /* RTOS interrupt          */
#define EMUINT_ISR   *((volatile unsigned long *)0x000D22)   /* Emulation interrupt     */
#define NMI_ISR      *((volatile unsigned long *)0x000D24)   /* Non-maskable interrupt  */
#define ILLEGAL_ISR  *((volatile unsigned long *)0x000D26)   /* Illegal operation TRAP  */

#define USER0_ISR    *((volatile unsigned long *)0x000D28)   /* User Defined trap 1 */
#define USER1_ISR    *((volatile unsigned long *)0x000D2A)   /* User Defined trap 1 */
#define USER2_ISR    *((volatile unsigned long *)0x000D2C)   /* User Defined trap 1 */
#define USER3_ISR    *((volatile unsigned long *)0x000D2E)   /* User Defined trap 1 */
#define USER4_ISR    *((volatile unsigned long *)0x000D30)   /* User Defined trap 1 */
#define USER5_ISR    *((volatile unsigned long *)0x000D32)   /* User Defined trap 1 */
#define USER6_ISR    *((volatile unsigned long *)0x000D34)   /* User Defined trap 1 */
#define USER7_ISR    *((volatile unsigned long *)0x000D36)   /* User Defined trap 1 */
#define USER8_ISR    *((volatile unsigned long *)0x000D38)   /* User Defined trap 1 */
#define USER9_ISR    *((volatile unsigned long *)0x000D3A)   /* User Defined trap 1 */
#define USER10_ISR   *((volatile unsigned long *)0x000D3C)   /* User Defined trap 1 */
#define USER11_ISR   *((volatile unsigned long *)0x000D3E)   /* User Defined trap 1 */


/*---------- Group 1 PIE Interrupt Service Routines    -------------*/
#define PDPINTA_ISR  *((volatile unsigned long *)0x000D40)   /* EV-A  */
#define PDPINTB_ISR  *((volatile unsigned long *)0x000D42)   /* EV-B  */
#define REVD1_3      *((volatile unsigned long *)0x000D44)   /* reserved  */
#define XINT1_ISR    *((volatile unsigned long *)0x000D46)
#define XINT2_ISR    *((volatile unsigned long *)0x000D48)
#define ADCINT_ISR   *((volatile unsigned long *)0x000D4A)   /* ADC */
#define TINT0_ISR    *((volatile unsigned long *)0x000D4C)    /* CPUTimer 0 */
#define WAKEINT_ISR  *((volatile unsigned long *)0x000D4E)   /* WD          */

/*----------- Group 2 PIE Interrupt Service Routines  --------------*/
#define CMP1INT_ISR  *((volatile unsigned long *)0x000D50)   /* EV-A          */
#define CMP2INT_ISR  *((volatile unsigned long *)0x000D52)   /* EV-A          */
#define CMP3INT_ISR  *((volatile unsigned long *)0x000D54)   /* EV-A          */
#define T1PINT_ISR   *((volatile unsigned long *)0x000D56)   /* EV-A          */
#define T1CINT_ISR   *((volatile unsigned long *)0x000D58)   /* EV-A          */