Release 8.1i - xst I.24Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.--> Parameter TMPDIR set to ./xst/projnav.tmpCPU : 0.00 / 0.30 s | Elapsed : 0.00 / 0.00 s --> Parameter xsthdpdir set to ./xstCPU : 0.00 / 0.30 s | Elapsed : 0.00 / 0.00 s --> Reading design: moto.prjTABLE OF CONTENTS  1) Synthesis Options Summary  2) HDL Compilation  3) HDL Analysis  4) HDL Synthesis     4.1) HDL Synthesis Report  5) Advanced HDL Synthesis     5.1) Advanced HDL Synthesis Report  6) Low Level Synthesis  7) Final Report=========================================================================*                      Synthesis Options Summary                        *=========================================================================---- Source ParametersInput File Name                    : "moto.prj"Input Format                       : mixedIgnore Synthesis Constraint File   : NO---- Target ParametersOutput File Name                   : "moto"Output Format                      : NGCTarget Device                      : XC9500 CPLDs---- Source OptionsTop Module Name                    : motoAutomatic FSM Extraction           : YESFSM Encoding Algorithm             : AutoMux Extraction                     : YESResource Sharing                   : YES---- Target OptionsAdd IO Buffers                     : YESMACRO Preserve                     : YESXOR Preserve                       : YESEquivalent register Removal        : YES---- General OptionsOptimization Goal                  : SpeedOptimization Effort                : 1Keep Hierarchy                     : YESRTL Output                         : YesHierarchy Separator                : /Bus Delimiter                      : <>Case Specifier                     : maintain---- Other Optionslso                                : moto.lsoverilog2001                        : YESsafe_implementation                : Nowysiwyg                            : NO==================================================================================================================================================*                          HDL Compilation                              *=========================================================================Compiling vhdl file "D:/temp/Xilinx/moto/moto2/moto.vhd" in Library work.Entity <moto> compiled.Entity <moto> (Architecture <behavioral>) compiled.=========================================================================*                            HDL Analysis                               *=========================================================================Analyzing Entity <moto> (Architecture <behavioral>).Entity <moto> analyzed. Unit <moto> generated.=========================================================================*                           HDL Synthesis                               *=========================================================================Synthesizing Unit <moto>.    Related source file is "D:/temp/Xilinx/moto/moto2/moto.vhd".WARNING:Xst:1777 - Inout <CUTA<1>> is never used or assigned.WARNING:Xst:1778 - Inout <CUTA<0>> is assigned but never used.Unit <moto> synthesized.=========================================================================HDL Synthesis ReportFound no macro==================================================================================================================================================*                       Advanced HDL Synthesis                          *==================================================================================================================================================Advanced HDL Synthesis ReportFound no macro==================================================================================================================================================*                         Low Level Synthesis                           *=========================================================================Optimizing unit <moto> ...=========================================================================*                            Final Report                               *=========================================================================Final ResultsRTL Top Level Output File Name     : moto.ngrTop Level Output File Name         : motoOutput Format                      : NGCOptimization Goal                  : SpeedKeep Hierarchy                     : YESTarget Technology                  : XC9500 CPLDsMacro Preserve                     : YESXOR Preserve                       : YESwysiwyg                            : NODesign Statistics# IOs                              : 2Cell Usage :# BELS                             : 1#      GND                         : 1# IO Buffers                       : 1#      OBUF                        : 1=========================================================================CPU : 6.39 / 6.70 s | Elapsed : 6.00 / 6.00 s --> Total memory usage is 90624 kilobytesNumber of errors   :    0 (   0 filtered)Number of warnings :    2 (   0 filtered)Number of infos    :    0 (   0 filtered)