------------------------------------------------------------------------------------ Company: -- Engineer: -- -- Create Date:    22:34:47 03/26/2006 -- Design Name: -- Module Name:    moto - Behavioral -- Project Name: -- Target Devices: -- Tool versions: -- Description: ---- Dependencies: ---- Revision: -- Revision 0.01 - File Created-- Additional Comments: ------------------------------------------------------------------------------------library IEEE;use IEEE.STD_LOGIC_1164.ALL;use IEEE.STD_LOGIC_ARITH.ALL;use IEEE.STD_LOGIC_UNSIGNED.ALL;---- Uncomment the following library declaration if instantiating---- any Xilinx primitives in this code.--library UNISIM;--use UNISIM.VComponents.all;entity moto is	port(				CUTA : inout STD_LOGIC_VECTOR (1 downto 0) := "10"		);		--assign pin locations		--attribute PINNUM of Dout:signal is "p33,40";end moto;		architecture Behavioral of moto isbegin    CUTA(0)<= '0';end Behavioral;