<?xml version='1.0' encoding='utf-8' ?>
<!DOCTYPE document SYSTEM "file:///D:/Xilinx/xc9500/data/xmlReport9k.dtd">
<document><ascFile>count4.rpt</ascFile><devFile>D:/Xilinx/xc9500/data/xc9572.chp</devFile><mfdFile>count4.mfd</mfdFile><htmlFile logo="xc9500_logo.jpg" pin_legend="pinlegend.htm" logic_legend="logiclegend.htm"/><header pkg="TQ100" date=" 4-25-2006" time="  2:48PM" speed="-10" design="count4" device="XC9572" status="1" eqnType="1" version="1.0" statusStr="Successful" swVersion="G.35"/><inputs id="CCLK"/><inputs id="CLR"/><inputs id="UP0_SPECSIG"/><inputs id="UP1_SPECSIG"/><inputs id="CE"/><pin id="FB1_MC1_PIN16" pinnum="16"/><pin id="FB1_MC2_PIN13" use="O" slew="SLOW" pinnum="13" signal="Qout0_SPECSIG"/><pin id="FB1_MC3_PIN18" pinnum="18"/><pin id="FB1_MC4_PIN20" pinnum="20"/><pin id="FB1_MC5_PIN14" pinnum="14"/><pin id="FB1_MC6_PIN15" pinnum="15"/><pin id="FB1_MC7_PIN25" pinnum="25"/><pin id="FB1_MC8_PIN17" use="I" pinnum="17" signal="CCLK"/><pin id="FB1_MC9_PIN22" pinnum="22"/><pin id="FB1_MC10_PIN28" pinnum="28"/><pin id="FB1_MC11_PIN23" pinnum="23"/><pin id="FB1_MC12_PIN33" pinnum="33"/><pin id="FB1_MC13_PIN36" pinnum="36"/><pin id="FB1_MC14_PIN27" pinnum="27"/><pin id="FB1_MC15_PIN29" pinnum="29"/><pin id="FB1_MC16_PIN39" pinnum="39"/><pin id="FB1_MC17_PIN30" pinnum="30"/><pin id="FB1_MC18_PIN40" pinnum="40"/><pin id="FB2_MC1_PIN87" pinnum="87"/><pin id="FB2_MC2_PIN94" use="O" slew="SLOW" pinnum="94" signal="Qout2_SPECSIG"/><pin id="FB2_MC3_PIN91" pinnum="91"/><pin id="FB2_MC4_PIN93" pinnum="93"/><pin id="FB2_MC5_PIN95" use="I" pinnum="95" signal="CLR"/><pin id="FB2_MC6_PIN96" pinnum="96"/><pin id="FB2_MC7_PIN3" pinnum="3"/><pin id="FB2_MC8_PIN97" use="I" pinnum="97" signal="UP1_SPECSIG"/><pin id="FB2_MC9_PIN99" pinnum="99"/><pin id="FB2_MC10_PIN1" pinnum="1"/><pin id="FB2_MC11_PIN4" pinnum="4"/><pin id="FB2_MC12_PIN6" pinnum="6"/><pin id="FB2_MC13_PIN8" pinnum="8"/><pin id="FB2_MC14_PIN9" pinnum="9"/><pin id="FB2_MC15_PIN11" use="I" pinnum="11" signal="UP0_SPECSIG"/><pin id="FB2_MC16_PIN10" pinnum="10"/><pin id="FB2_MC17_PIN12" pinnum="12"/><pin id="FB2_MC18_PIN92" pinnum="92"/><pin id="FB3_MC1_PIN41" pinnum="41"/><pin id="FB3_MC2_PIN32" use="O" slew="SLOW" pinnum="32" signal="Qout1_SPECSIG"/><pin id="FB3_MC3_PIN49" pinnum="49"/><pin id="FB3_MC4_PIN50" pinnum="50"/><pin id="FB3_MC5_PIN35" pinnum="35"/><pin id="FB3_MC6_PIN53" pinnum="53"/><pin id="FB3_MC7_PIN54" pinnum="54"/><pin id="FB3_MC8_PIN37" pinnum="37"/><pin id="FB3_MC9_PIN42" pinnum="42"/><pin id="FB3_MC10_PIN60" pinnum="60"/><pin id="FB3_MC11_PIN52" pinnum="52"/><pin id="FB3_MC12_PIN61" pinnum="61"/><pin id="FB3_MC13_PIN63" pinnum="63"/><pin id="FB3_MC14_PIN55" pinnum="55"/><pin id="FB3_MC15_PIN56" pinnum="56"/><pin id="FB3_MC16_PIN65" pinnum="65"/><pin id="FB3_MC17_PIN58" pinnum="58"/><pin id="FB3_MC18_PIN59" pinnum="59"/><pin id="FB4_MC1_PIN66" pinnum="66"/><pin id="FB4_MC2_PIN64" use="O" slew="SLOW" pinnum="64" signal="Qout3_SPECSIG"/><pin id="FB4_MC3_PIN71" pinnum="71"/><pin id="FB4_MC4_PIN72" pinnum="72"/><pin id="FB4_MC5_PIN67" pinnum="67"/><pin id="FB4_MC6_PIN76" pinnum="76"/><pin id="FB4_MC7_PIN77" pinnum="77"/><pin id="FB4_MC8_PIN68" pinnum="68"/><pin id="FB4_MC9_PIN70" pinnum="70"/><pin id="FB4_MC10_PIN81" pinnum="81"/><pin id="FB4_MC11_PIN74" use="I" pinnum="74" signal="CE"/><pin id="FB4_MC12_PIN82" pinnum="82"/><pin id="FB4_MC13_PIN85" pinnum="85"/><pin id="FB4_MC14_PIN78" pinnum="78"/><pin id="FB4_MC15_PIN89" pinnum="89"/><pin id="FB4_MC16_PIN86" pinnum="86"/><pin id="FB4_MC17_PIN90" pinnum="90"/><pin id="FB4_MC18_PIN79" pinnum="79"/><fblock id="FB1" pinUse="2" inputUse="5"><macrocell id="FB1_MC1" pin="FB1_MC1_PIN16"/><macrocell id="FB1_MC2" pin="FB1_MC2_PIN13" sigUse="5" signal="Qout0_SPECSIG"><pterms pt1="FB1_2_1" pt2="FB1_2_2" pt3="FB1_2_3" pt4="FB1_2_4"/></macrocell><macrocell id="FB1_MC3" pin="FB1_MC3_PIN18"/><macrocell id="FB1_MC4" pin="FB1_MC4_PIN20"/><macrocell id="FB1_MC5" pin="FB1_MC5_PIN14"/><macrocell id="FB1_MC6" pin="FB1_MC6_PIN15"/><macrocell id="FB1_MC7" pin="FB1_MC7_PIN25"/><macrocell id="FB1_MC8" pin="FB1_MC8_PIN17"/><macrocell id="FB1_MC9" pin="FB1_MC9_PIN22"/><macrocell id="FB1_MC10" pin="FB1_MC10_PIN28"/><macrocell id="FB1_MC11" pin="FB1_MC11_PIN23"/><macrocell id="FB1_MC12" pin="FB1_MC12_PIN33"/><macrocell id="FB1_MC13" pin="FB1_MC13_PIN36"/><macrocell id="FB1_MC14" pin="FB1_MC14_PIN27"/><macrocell id="FB1_MC15" pin="FB1_MC15_PIN29"/><macrocell id="FB1_MC16" pin="FB1_MC16_PIN39"/><macrocell id="FB1_MC17" pin="FB1_MC17_PIN30"/><macrocell id="FB1_MC18" pin="FB1_MC18_PIN40"/><fbinput id="FB1_I1" signal="CCLK"/><fbinput id="FB1_I2" signal="CE"/><fbinput id="FB1_I3" signal="CLR"/><fbinput id="FB1_I4" signal="UP0_SPECSIG"/><fbinput id="FB1_I5" signal="UP1_SPECSIG"/><pterm id="FB1_2_1"><signal id="UP1_SPECSIG"/><signal id="UP0_SPECSIG" negated="ON"/><signal id="CE" negated="ON"/></pterm><pterm id="FB1_2_2"><signal id="UP1_SPECSIG" negated="ON"/><signal id="UP0_SPECSIG"/><signal id="CE" negated="ON"/></pterm><pterm id="FB1_2_3"><signal id="CLR"/></pterm><pterm id="FB1_2_4"><signal id="CCLK"/></pterm><equation id="Qout0_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB1_2_1"/><eq_pterm ptindx="FB1_2_2"/></d2><clk><eq_pterm ptindx="FB1_2_4"/></clk><reset><eq_pterm ptindx="FB1_2_3"/></reset><prld ptindx="GND"/></equation></fblock><fblock id="FB2" pinUse="4" inputUse="7"><macrocell id="FB2_MC1" pin="FB2_MC1_PIN87"/><macrocell id="FB2_MC2" pin="FB2_MC2_PIN94" sigUse="7" signal="Qout2_SPECSIG"><pterms pt1="FB2_2_1" pt2="FB2_2_2" pt3="FB2_2_3" pt4="FB2_2_4"/></macrocell><macrocell id="FB2_MC3" pin="FB2_MC3_PIN91"/><macrocell id="FB2_MC4" pin="FB2_MC4_PIN93"/><macrocell id="FB2_MC5" pin="FB2_MC5_PIN95"/><macrocell id="FB2_MC6" pin="FB2_MC6_PIN96"/><macrocell id="FB2_MC7" pin="FB2_MC7_PIN3"/><macrocell id="FB2_MC8" pin="FB2_MC8_PIN97"/><macrocell id="FB2_MC9" pin="FB2_MC9_PIN99"/><macrocell id="FB2_MC10" pin="FB2_MC10_PIN1"/><macrocell id="FB2_MC11" pin="FB2_MC11_PIN4"/><macrocell id="FB2_MC12" pin="FB2_MC12_PIN6"/><macrocell id="FB2_MC13" pin="FB2_MC13_PIN8"/><macrocell id="FB2_MC14" pin="FB2_MC14_PIN9"/><macrocell id="FB2_MC15" pin="FB2_MC15_PIN11"/><macrocell id="FB2_MC16" pin="FB2_MC16_PIN10"/><macrocell id="FB2_MC17" pin="FB2_MC17_PIN12"/><macrocell id="FB2_MC18" pin="FB2_MC18_PIN92"/><fbinput id="FB2_I1" signal="CCLK"/><fbinput id="FB2_I2" signal="CE"/><fbinput id="FB2_I3" signal="CLR"/><fbinput id="FB2_I4" signal="Qout0_SPECSIG"/><fbinput id="FB2_I5" signal="Qout1_SPECSIG"/><fbinput id="FB2_I6" signal="UP0_SPECSIG"/><fbinput id="FB2_I7" signal="UP1_SPECSIG"/><pterm id="FB2_2_1"><signal id="Qout0_SPECSIG"/><signal id="Qout1_SPECSIG"/><signal id="UP1_SPECSIG" negated="ON"/><signal id="UP0_SPECSIG"/><signal id="CE" negated="ON"/></pterm><pterm id="FB2_2_2"><signal id="Qout0_SPECSIG" negated="ON"/><signal id="Qout1_SPECSIG" negated="ON"/><signal id="UP1_SPECSIG"/><signal id="UP0_SPECSIG" negated="ON"/><signal id="CE" negated="ON"/></pterm><pterm id="FB2_2_3"><signal id="CLR"/></pterm><pterm id="FB2_2_4"><signal id="CCLK"/></pterm><equation id="Qout2_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB2_2_1"/><eq_pterm ptindx="FB2_2_2"/></d2><clk><eq_pterm ptindx="FB2_2_4"/></clk><reset><eq_pterm ptindx="FB2_2_3"/></reset><prld ptindx="GND"/></equation></fblock><fblock id="FB3" pinUse="1" inputUse="6"><macrocell id="FB3_MC1" pin="FB3_MC1_PIN41"/><macrocell id="FB3_MC2" pin="FB3_MC2_PIN32" sigUse="6" signal="Qout1_SPECSIG"><pterms pt1="FB3_2_1" pt2="FB3_2_2" pt3="FB3_2_3" pt4="FB3_2_4"/></macrocell><macrocell id="FB3_MC3" pin="FB3_MC3_PIN49"/><macrocell id="FB3_MC4" pin="FB3_MC4_PIN50"/><macrocell id="FB3_MC5" pin="FB3_MC5_PIN35"/><macrocell id="FB3_MC6" pin="FB3_MC6_PIN53"/><macrocell id="FB3_MC7" pin="FB3_MC7_PIN54"/><macrocell id="FB3_MC8" pin="FB3_MC8_PIN37"/><macrocell id="FB3_MC9" pin="FB3_MC9_PIN42"/><macrocell id="FB3_MC10" pin="FB3_MC10_PIN60"/><macrocell id="FB3_MC11" pin="FB3_MC11_PIN52"/><macrocell id="FB3_MC12" pin="FB3_MC12_PIN61"/><macrocell id="FB3_MC13" pin="FB3_MC13_PIN63"/><macrocell id="FB3_MC14" pin="FB3_MC14_PIN55"/><macrocell id="FB3_MC15" pin="FB3_MC15_PIN56"/><macrocell id="FB3_MC16" pin="FB3_MC16_PIN65"/><macrocell id="FB3_MC17" pin="FB3_MC17_PIN58"/><macrocell id="FB3_MC18" pin="FB3_MC18_PIN59"/><fbinput id="FB3_I1" signal="CCLK"/><fbinput id="FB3_I2" signal="CE"/><fbinput id="FB3_I3" signal="CLR"/><fbinput id="FB3_I4" signal="Qout0_SPECSIG"/><fbinput id="FB3_I5" signal="UP0_SPECSIG"/><fbinput id="FB3_I6" signal="UP1_SPECSIG"/><pterm id="FB3_2_1"><signal id="Qout0_SPECSIG"/><signal id="UP1_SPECSIG" negated="ON"/><signal id="UP0_SPECSIG"/><signal id="CE" negated="ON"/></pterm><pterm id="FB3_2_2"><signal id="Qout0_SPECSIG" negated="ON"/><signal id="UP1_SPECSIG"/><signal id="UP0_SPECSIG" negated="ON"/><signal id="CE" negated="ON"/></pterm><pterm id="FB3_2_3"><signal id="CLR"/></pterm><pterm id="FB3_2_4"><signal id="CCLK"/></pterm><equation id="Qout1_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB3_2_1"/><eq_pterm ptindx="FB3_2_2"/></d2><clk><eq_pterm ptindx="FB3_2_4"/></clk><reset><eq_pterm ptindx="FB3_2_3"/></reset><prld ptindx="GND"/></equation></fblock><fblock id="FB4" pinUse="2" inputUse="6"><macrocell id="FB4_MC1" pin="FB4_MC1_PIN66"/><macrocell id="FB4_MC2" pin="FB4_MC2_PIN64" sigUse="6" signal="Qout3_SPECSIG"><pterms pt1="FB4_2_1" pt2="FB4_2_2" pt3="FB4_2_3" pt4="FB4_2_4"/></macrocell><macrocell id="FB4_MC3" pin="FB4_MC3_PIN71"/><macrocell id="FB4_MC4" pin="FB4_MC4_PIN72"/><macrocell id="FB4_MC5" pin="FB4_MC5_PIN67"/><macrocell id="FB4_MC6" pin="FB4_MC6_PIN76"/><macrocell id="FB4_MC7" pin="FB4_MC7_PIN77"/><macrocell id="FB4_MC8" pin="FB4_MC8_PIN68"/><macrocell id="FB4_MC9" pin="FB4_MC9_PIN70"/><macrocell id="FB4_MC10" pin="FB4_MC10_PIN81"/><macrocell id="FB4_MC11" pin="FB4_MC11_PIN74"/><macrocell id="FB4_MC12" pin="FB4_MC12_PIN82"/><macrocell id="FB4_MC13" pin="FB4_MC13_PIN85"/><macrocell id="FB4_MC14" pin="FB4_MC14_PIN78"/><macrocell id="FB4_MC15" pin="FB4_MC15_PIN89"/><macrocell id="FB4_MC16" pin="FB4_MC16_PIN86"/><macrocell id="FB4_MC17" pin="FB4_MC17_PIN90"/><macrocell id="FB4_MC18" pin="FB4_MC18_PIN79"/><fbinput id="FB4_I1" signal="CCLK"/><fbinput id="FB4_I2" signal="CE"/><fbinput id="FB4_I3" signal="CLR"/><fbinput id="FB4_I4" signal="UP0_SPECSIG"/><fbinput id="FB4_I5" signal="UP1_SPECSIG"/><fbinput id="FB4_I6" fbk="LFBK" signal="dirFBKLFBK_SPECSIG"/><pterm id="FB4_2_1"><signal id="UP1_SPECSIG"/><signal id="UP0_SPECSIG" negated="ON"/><signal id="CE" negated="ON"/><signal id="dirFBKLFBK_SPECSIG" negated="ON"/></pterm><pterm id="FB4_2_2"><signal id="UP1_SPECSIG" negated="ON"/><signal id="UP0_SPECSIG"/><signal id="CE" negated="ON"/><signal id="dirFBKLFBK_SPECSIG"/></pterm><pterm id="FB4_2_3"><signal id="CLR"/></pterm><pterm id="FB4_2_4"><signal id="CCLK"/></pterm><equation id="Qout3_SPECSIG" regUse="T"><d2><eq_pterm ptindx="FB4_2_1"/><eq_pterm ptindx="FB4_2_2"/></d2><clk><eq_pterm ptindx="FB4_2_4"/></clk><reset><eq_pterm ptindx="FB4_2_3"/></reset><prld ptindx="GND"/></equation></fblock><vcc/><gnd/><compOpts loc="ON" uim="ON" part="xc9572-10-TQ100" prld="LOW" slew="SLOW" mlopt="ON" power="AUTO" gsropt="OFF" gtsopt="OFF" inputs="36" keepio="OFF" pinfbk="ON" pterms="25" unused="OFF" exhaust="OFF" gclkopt="OFF" wysiwyg="OFF" ignorets="OFF" localfbk="ON" optimize="SPEED"/><specSig value="UP&lt;0&gt;" signal="UP0_SPECSIG"/><specSig value="UP&lt;1&gt;" signal="UP1_SPECSIG"/><specSig value="Qout&lt;0&gt;" signal="Qout0_SPECSIG"/><specSig value="Qout&lt;2&gt;" signal="Qout2_SPECSIG"/><specSig value="Qout&lt;1&gt;" signal="Qout1_SPECSIG"/><specSig value="Qout&lt;3&gt;" signal="Qout3_SPECSIG"/><specSig value="dir.FBK.LFBK" signal="dirFBKLFBK_SPECSIG"/></document>