?? mdecode_timesim.nlf
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Release 6.3i - netgen G.35Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved.Reading design mdecode.nga ... Flattening design ... Flattening design completed. Specializing design ... Specializing design completed. Preping physical only global signals ... Preping design's networks ... Preping design's macros ...Writing VHDL netlist mdecode_timesim.vhd ...Writing VHDL SDF file mdecode_timesim.sdf ...Total memory usage is 36068 kilobytes?? 快捷鍵說明
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