<?xml version='1.0' encoding='utf-8' ?>
<!DOCTYPE document SYSTEM 'file:///D:/Xilinx/chipviewer/data/xsl/buildXML.dtd'>

<document>
<design name='top'/>
<xilinx path='D:/Xilinx;'/>
<projDir path='D:\FPGA\xc_9572'/>
<xslDir path='D:/Xilinx/chipviewer/data/xsl'/>
<fileDir path='/chipviewer/data/html'/>
<dataFile file='index.htm'/>
<dataFile file='report.htm'/>
<dataFile file='eqns.js'/>
<dataFile file='fbs.js'/>
<dataFile file='maplogic.js'/>
<dataFile file='pins.js'/>
<dataFile file='tooltips.js'/>
<dataFile file='errors.js'/>
<dataFile file='leftnav.js'/>
<dataFile file='paths.js'/>
<dataFile file='summary.js'/>
<dataFile file='topnav.js'/>
<dataFile file='applet.js'/>
<dataFile file='plugin.js'/>
<dataFile file='ns4plugin.js'/>
<dataFile file='equations.htm'/>
<dataFile file='result.htm'/>
<dataFile file='style.css'/>
<dataFile file='blank.gif'/>
<dataFile file='fbview.jpg'/>
<dataFile file='pinview.jpg'/>
<dataFile file='xc9500_logo.jpg'/>
<dataFile file='asciidoc.htm'/>
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<dataFile file='errorsdoc.htm'/>
<dataFile file='fbs_FBdoc.htm'/>
<dataFile file='fbsdoc.htm'/>
<dataFile file='mapinputdoc.htm'/>
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<dataFile file='summarydoc.htm'/>
<dataFile file='check.htm'/>
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<xmlFile file='D:/Xilinx/chipviewer/data/xsl/logiclegend.xml'>
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<rptFile file='top.rpt'/>
<timFile file='top.tim'/>
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