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?? huffman_en_full.v

?? A Huffman implementation reference design in both VHDL and Verilog is provided by the Xilinx
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		12'b000000100000: //32
		   begin  vlcode_ac1 <= {17'b00000000000011000,rl_in[11]}; codelength_ac1 <= 5'd16; end
		12'b000000100001: //33
		   begin  vlcode_ac1 <= {17'b00000000000010111,rl_in[11]}; codelength_ac1 <= 5'd16; end
		12'b000000100010: //34
		   begin  vlcode_ac1 <= {17'b00000000000010110,rl_in[11]}; codelength_ac1 <= 5'd16; end
		12'b000000100011: //35
		   begin  vlcode_ac1 <= {17'b00000000000010101,rl_in[11]}; codelength_ac1 <= 5'd16; end
		12'b000000100100: //36
		   begin  vlcode_ac1 <= {17'b00000000000010100,rl_in[11]}; codelength_ac1 <= 5'd16; end
		12'b000000100101: //37
		   begin  vlcode_ac1 <= {17'b00000000000010011,rl_in[11]}; codelength_ac1 <= 5'd16; end
		12'b000000100110: //38
		   begin  vlcode_ac1 <= {17'b00000000000010010,rl_in[11]}; codelength_ac1 <= 5'd16; end
		12'b000000100111: //39
		   begin  vlcode_ac1 <= {17'b00000000000010001,rl_in[11]}; codelength_ac1 <= 5'd16; end
		12'b000000101000: //40
		   begin  vlcode_ac1 <= {17'b00000000000010000,rl_in[11]}; codelength_ac1 <= 5'd16; end
        endcase
		end
 	/******************** scan type = x, run = 1, level = x ********/
    {1'bx,6'b000001,11'bx}: // run = 1
	    begin
        case ({1'b0,rl_in[10:0]}) //(level)
		12'b000000000110: //6
		   begin  vlcode_ac1 <= {17'b00000000000010110,rl_in[11]}; codelength_ac1 <= 5'd14; end
		12'b000000000111: //7
		   begin  vlcode_ac1 <= {17'b00000000000010101,rl_in[11]}; codelength_ac1 <= 5'd14; end
		12'b000000001000: //8
		   begin  vlcode_ac1 <= {17'b00000000000011111,rl_in[11]}; codelength_ac1 <= 5'd16; end
		12'b000000001001: //9
		   begin  vlcode_ac1 <= {17'b00000000000011110,rl_in[11]}; codelength_ac1 <= 5'd16; end		
		12'b000000001010: //10
		   begin  vlcode_ac1 <= {17'b00000000000011101,rl_in[11]}; codelength_ac1 <= 5'd16; end
		12'b000000001011: //11
		   begin  vlcode_ac1 <= {17'b00000000000011100,rl_in[11]}; codelength_ac1 <= 5'd16; end
		12'b000000001100: //12
		   begin  vlcode_ac1 <= {17'b00000000000011011,rl_in[11]}; codelength_ac1 <= 5'd16; end
		12'b000000001101: //13
		   begin  vlcode_ac1 <= {17'b00000000000011010,rl_in[11]}; codelength_ac1 <= 5'd16; end
		12'b000000001110: //14
		   begin  vlcode_ac1 <= {17'b00000000000011001,rl_in[11]}; codelength_ac1 <= 5'd16; end
		12'b000000001111: //15
		   begin  vlcode_ac1 <= {17'b00000000000010011,rl_in[11]}; codelength_ac1 <= 5'd17; end
		12'b000000010000: //16
		   begin  vlcode_ac1 <= {17'b00000000000010010,rl_in[11]}; codelength_ac1 <= 5'd17; end
		12'b000000010001: //17
		   begin  vlcode_ac1 <= {17'b00000000000010001,rl_in[11]}; codelength_ac1 <= 5'd17; end
		12'b000000010010: //18
		   begin  vlcode_ac1 <= {17'b00000000000010000,rl_in[11]}; codelength_ac1 <= 5'd17; end
        endcase
		   end

 	/***************************************************************************************/

    {1'bx,6'b000010,11'b00000000101}: // scan type = x, run = 2, level = 5
		   begin  vlcode_ac1 <= {17'b00000000000010100,rl_in[11]}; codelength_ac1 <= 5'd14; end
    {1'bx,6'b000011,11'b00000000011}: // scan type = x, run = 3, level = 4
		   begin  vlcode_ac1 <= {17'b00000000000010011,rl_in[11]}; codelength_ac1 <= 5'd14; end

 	/***************************************************************************************/

    {1'b0,6'bx,11'b00000000001}: // scan type = 0, run = x, level = 1
	    begin
		case ({rl_in[17:12]}) //(run)
		6'b000001 : //1
		   begin  vlcode_ac1 <= {17'b00000000000000011,rl_in[11]}; codelength_ac1 <= 5'd4; end
		6'b000010 : //2
		   begin  vlcode_ac1 <= {17'b00000000000000101,rl_in[11]}; codelength_ac1 <= 5'd5; end
		6'b000011 : //3
		   begin  vlcode_ac1 <= {17'b00000000000000111,rl_in[11]}; codelength_ac1 <= 5'd6; end
		6'b000100 : //4
		   begin  vlcode_ac1 <= {17'b00000000000000110,rl_in[11]}; codelength_ac1 <= 5'd6; end
		6'b000101 : //5
		   begin  vlcode_ac1 <= {17'b00000000000000111,rl_in[11]}; codelength_ac1 <= 5'd7; end		
		6'b000110 : //6
		   begin  vlcode_ac1 <= {17'b00000000000000101,rl_in[11]}; codelength_ac1 <= 5'd7; end
		6'b000111 : //7
		   begin  vlcode_ac1 <= {17'b00000000000000100,rl_in[11]}; codelength_ac1 <= 5'd7; end
		6'b001000 : //8
		   begin  vlcode_ac1 <= {17'b00000000000000111,rl_in[11]}; codelength_ac1 <= 5'd8; end
		6'b001001 : //9
		   begin  vlcode_ac1 <= {17'b00000000000000101,rl_in[11]}; codelength_ac1 <= 5'd8; end
		6'b001010 : //10
		   begin  vlcode_ac1 <= {17'b00000000000100111,rl_in[11]}; codelength_ac1 <= 5'd9; end
		6'b001011 : //11
		   begin  vlcode_ac1 <= {17'b00000000000100011,rl_in[11]}; codelength_ac1 <= 5'd9; end
		6'b001100 : //12
		   begin  vlcode_ac1 <= {17'b00000000000100010,rl_in[11]}; codelength_ac1 <= 5'd9; end
		6'b001101 : //13
		   begin  vlcode_ac1 <= {17'b00000000000100000,rl_in[11]}; codelength_ac1 <= 5'd9; end
		6'b001110 : //14
		   begin  vlcode_ac1 <= {17'b00000000000001110,rl_in[11]}; codelength_ac1 <= 5'd11; end
		6'b001111 : //15
		   begin  vlcode_ac1 <= {17'b00000000000001101,rl_in[11]}; codelength_ac1 <= 5'd11; end		
		6'b010000 : //16
		   begin  vlcode_ac1 <= {17'b00000000000001000,rl_in[11]}; codelength_ac1 <= 5'd11; end
        endcase
		end

 	/***************************************************************************************/

   {1'b1,6'bx,11'b00000000001}: // scan type = 1, run = x, level = 1
	    begin
		case ({rl_in[17:12]}) //(run)
		6'b000001 : //1
		   begin  vlcode_ac1 <= {17'b00000000000000010,rl_in[11]}; codelength_ac1 <= 5'd4; end
		6'b000010 : //2
		   begin  vlcode_ac1 <= {17'b00000000000000101,rl_in[11]}; codelength_ac1 <= 5'd6; end
		6'b000011 : //3
		   begin  vlcode_ac1 <= {17'b00000000000000111,rl_in[11]}; codelength_ac1 <= 5'd6; end
		6'b000100 : //4
		   begin  vlcode_ac1 <= {17'b00000000000000110,rl_in[11]}; codelength_ac1 <= 5'd7; end
		6'b000101 : //5
		   begin  vlcode_ac1 <= {17'b00000000000000111,rl_in[11]}; codelength_ac1 <= 5'd7; end		
		6'b000110 : //6
		   begin  vlcode_ac1 <= {17'b00000000000000110,rl_in[11]}; codelength_ac1 <= 5'd8; end
		6'b000111 : //7
		   begin  vlcode_ac1 <= {17'b00000000000000100,rl_in[11]}; codelength_ac1 <= 5'd8; end
		6'b001000 : //8
		   begin  vlcode_ac1 <= {17'b00000000000000101,rl_in[11]}; codelength_ac1 <= 5'd8; end
		6'b001001 : //9
		   begin  vlcode_ac1 <= {17'b00000000001111000,rl_in[11]}; codelength_ac1 <= 5'd8; end
		6'b001010 : //10
		   begin  vlcode_ac1 <= {17'b00000000001111010,rl_in[11]}; codelength_ac1 <= 5'd8; end
		6'b001011 : //11
		   begin  vlcode_ac1 <= {17'b00000000000100001,rl_in[11]}; codelength_ac1 <= 5'd9; end
		6'b001100 : //12
		   begin  vlcode_ac1 <= {17'b00000000000100101,rl_in[11]}; codelength_ac1 <= 5'd9; end
		6'b001101 : //13
		   begin  vlcode_ac1 <= {17'b00000000000100100,rl_in[11]}; codelength_ac1 <= 5'd9; end
		6'b001110 : //14
		   begin  vlcode_ac1 <= {17'b00000000000000101,rl_in[11]}; codelength_ac1 <= 5'd10; end
		6'b001111 : //15
		   begin  vlcode_ac1 <= {17'b00000000000000111,rl_in[11]}; codelength_ac1 <= 5'd10; end		
		6'b010000 : //16
		   begin  vlcode_ac1 <= {17'b00000000000001101,rl_in[11]}; codelength_ac1 <= 5'd11; end
        endcase
		end

 	/***************************************************************************************/

	{1'b0,6'b000000,11'bx}: // scan type = 0, run = 0, level = x
	    begin
		case ({1'b0,rl_in[10:0]}) //(level)
		12'b000000000010 : //2
		   begin  vlcode_ac1 <= {17'b00000000000000100,rl_in[11]}; codelength_ac1 <= 5'd5; end
		12'b000000000011 : //3
		   begin  vlcode_ac1 <= {17'b00000000000000101,rl_in[11]}; codelength_ac1 <= 5'd6; end
		12'b000000000100 : //4
		   begin  vlcode_ac1 <= {17'b00000000000000110,rl_in[11]}; codelength_ac1 <= 5'd8; end
		12'b000000000101 : //5
		   begin  vlcode_ac1 <= {17'b00000000000100110,rl_in[11]}; codelength_ac1 <= 5'd9; end
		12'b000000000110 : //6
		   begin  vlcode_ac1 <= {17'b00000000000100001,rl_in[11]}; codelength_ac1 <= 5'd9; end
		12'b000000000111 : //7
		   begin  vlcode_ac1 <= {17'b00000000000001010,rl_in[11]}; codelength_ac1 <= 5'd11; end
		12'b000000001000 : //8
		   begin  vlcode_ac1 <= {17'b00000000000011101,rl_in[11]}; codelength_ac1 <= 5'd13; end
		12'b000000001001 : //9
		   begin  vlcode_ac1 <= {17'b00000000000011000,rl_in[11]}; codelength_ac1 <= 5'd13; end
		12'b000000001010 : //10
		   begin  vlcode_ac1 <= {17'b00000000000010011,rl_in[11]}; codelength_ac1 <= 5'd13; end	
		12'b000000001011 : //11
		   begin  vlcode_ac1 <= {17'b00000000000010000,rl_in[11]}; codelength_ac1 <= 5'd13; end
		12'b000000001100 : //12
		   begin  vlcode_ac1 <= {17'b00000000000011010,rl_in[11]}; codelength_ac1 <= 5'd14; end
		12'b000000001101 : //13
		   begin  vlcode_ac1 <= {17'b00000000000011001,rl_in[11]}; codelength_ac1 <= 5'd14; end
		12'b000000001110 : //14
		   begin  vlcode_ac1 <= {17'b00000000000011000,rl_in[11]}; codelength_ac1 <= 5'd14; end
		12'b000000001111 : //15
		   begin  vlcode_ac1 <= {17'b00000000000010111,rl_in[11]}; codelength_ac1 <= 5'd14; end
		endcase
		end

 	/***************************************************************************************/

    {1'b1,6'b000000,11'bx}: // scan type = 1, run = 0, level = x
	    begin
		case ({1'b0,rl_in[10:0]}) //(level)
		12'b000000000001 : //1
		   begin  vlcode_ac1 <= {17'b00000000000000010,rl_in[11]}; codelength_ac1 <= 5'd3; end
		12'b000000000010 : //2
		   begin  vlcode_ac1 <= {17'b00000000000000110,rl_in[11]}; codelength_ac1 <= 5'd4; end
		12'b000000000011 : //3
		   begin  vlcode_ac1 <= {17'b00000000000000111,rl_in[11]}; codelength_ac1 <= 5'd5; end
		12'b000000000100 : //4
		   begin  vlcode_ac1 <= {17'b00000000000011100,rl_in[11]}; codelength_ac1 <= 5'd6; end
		12'b000000000101 : //5
		   begin  vlcode_ac1 <= {17'b00000000000011101,rl_in[11]}; codelength_ac1 <= 5'd6; end
		12'b000000000110 : //6
		   begin  vlcode_ac1 <= {17'b00000000000000101,rl_in[11]}; codelength_ac1 <= 5'd7; end
		12'b000000000111 : //7
		   begin  vlcode_ac1 <= {17'b00000000000000100,rl_in[11]}; codelength_ac1 <= 5'd7; end
		12'b000000001000 : //8
		   begin  vlcode_ac1 <= {17'b00000000001111011,rl_in[11]}; codelength_ac1 <= 5'd8; end
		12'b000000001001 : //9
		   begin  vlcode_ac1 <= {17'b00000000001111100,rl_in[11]}; codelength_ac1 <= 5'd8; end
		12'b000000001010 : //10
		   begin  vlcode_ac1 <= {17'b00000000000100011,rl_in[11]}; codelength_ac1 <= 5'd9; end	
		12'b000000001011 : //11
		   begin  vlcode_ac1 <= {17'b00000000000100010,rl_in[11]}; codelength_ac1 <= 5'd9; end
		12'b000000001100 : //12
		   begin  vlcode_ac1 <= {17'b00000000011111010,rl_in[11]}; codelength_ac1 <= 5'd9; end
		12'b000000001101 : //13
		   begin  vlcode_ac1 <= {17'b00000000011111011,rl_in[11]}; codelength_ac1 <= 5'd9; end
		12'b000000001110 : //14
		   begin  vlcode_ac1 <= {17'b00000000011111110,rl_in[11]}; codelength_ac1 <= 5'd9; end
		12'b000000001111 : //15
		   begin  vlcode_ac1 <= {17'b00000000011111111,rl_in[11]}; codelength_ac1 <= 5'd9; end
		endcase
		end

 	/***************************************************************************************/

	{1'b0,6'bx,11'b00000000010}: // scan type = 0, run = x, level = 2
	    begin
		case ({1'b0,rl_in[10:0]}) //(level)
		12'b000000000001 : //1
		   begin  vlcode_ac1 <= {17'b00000000000000110,rl_in[11]}; codelength_ac1 <= 5'd7; end
		12'b000000000010 : //2
		   begin  vlcode_ac1 <= {17'b00000000000000100,rl_in[11]}; codelength_ac1 <= 5'd8; end
		12'b000000000011 : //3
		   begin  vlcode_ac1 <= {17'b00000000000100100,rl_in[11]}; codelength_ac1 <= 5'd9; end
		12'b000000000100 : //4
		   begin  vlcode_ac1 <= {17'b00000000000001111,rl_in[11]}; codelength_ac1 <= 5'd11; end
		12'b000000000101 : //5
		   begin  vlcode_ac1 <= {17'b00000000000001001,rl_in[11]}; codelength_ac1 <= 5'd11; end
        endcase
		end

 	/***************************************************************************************/

	{1'b1,6'bx,11'b00000000010}: // scan type = 1, run = x, level = 2
	    begin
		case ({1'b0,rl_in[10:0]}) //(level)
		12'b000000000001 : //1
		   begin  vlcode_ac1 <= {17'b00000000000000110,rl_in[11]}; codelength_ac1 <= 5'd6; end
		12'b000000000010 : //2
		   begin  vlcode_ac1 <= {17'b00000000000001110,rl_in[11]}; codelength_ac1 <= 5'd8; end
		12'b000000000011 : //3
		   begin  vlcode_ac1 <= {17'b00000000000100110,rl_in[11]}; codelength_ac1 <= 5'd9; end
		12'b000000000100 : //4
		   begin  vlcode_ac1 <= {17'b00000000011111101,rl_in[11]}; codelength_ac1 <= 5'd9; end
		12'b000000000101 : //5
		   begin  vlcode_ac1 <= {17'b00000000000000100,rl_in[11]}; codelength_ac1 <= 5'd10; end
        endcase
		end

 	/***************************************************************************************/

    {1'bx,6'b000010,11'b00000000101}: // scan_type = 0, EOB
		   begin  vlcode_ac1 <= {17'b00000000000010100,rl_in[11]}; codelength_ac1 <= 5'd14; end
    {1'bx,6'b000010,11'b00000000101}: // scan type = x, run = 2, level = 5
		   begin  vlcode_ac1 <= {17'b00000000000010100,rl_in[11]}; codelength_ac1 <= 5'd14; end
    {1'bx,6'b000010,11'b00000000101}: // scan type = x, run = 2, level = 5
		   begin  vlcode_ac1 <= {17'b00000000000010100,rl_in[11]}; codelength_ac1 <= 5'd14; end
    {1'bx,6'b000010,11'b00000000101}: // scan type = x, run = 2, level = 5
		   begin  vlcode_ac1 <= {17'b00000000000010100,rl_in[11]}; codelength_ac1 <= 5'd14; end
    {1'bx,6'b000010,11'b00000000101}: // scan type = x, run = 2, level = 5
		   begin  vlcode_ac1 <= {17'b00000000000010100,rl_in[11]}; codelength_ac1 <= 5'd14; end
    {1'bx,6'b000010,11'b00000000101}: // scan type = x, run = 2, level = 5
		   begin  vlcode_ac1 <= {17'b00000000000010100,rl_in[11]}; codelength_ac1 <= 5'd14; end

     default: 
        begin  vlcode_ac1 <= rl_in; codelength_ac1 <= 5'd18; end


     endcase
     end
end


/*****************************************************************************/

/* pipeline vlcode_ac1 and codelength_ac1 to match the 2 pipe stages of the
corresponding DC values */

always @ (posedge CLK)
  if (RST)
     begin 
      vlcode_ac <= {18'b0}; codelength_ac <= 5'd0;
     end
  else
     begin 
      vlcode_ac <= vlcode_ac1; codelength_ac <= codelength_ac1; 
     end

/*****************************************************************************/

/* select code and codelength. Counter value set at 2 because of the 2 pipestages
od the AC and DC codelengths and vl codes */

always @ (posedge CLK or posedge RST)
   begin
   if (RST)
       begin

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亚洲欧美第一页_禁久久精品乱码_粉嫩av一区二区三区免费野_久草精品视频
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