?? huffman_en_full.vhd
字號:
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
use IEEE.numeric_std.all;
ENTITY huffman_en IS
PORT (
CLK : IN std_logic;
RST : IN std_logic;
rdy_in : IN std_logic;
rl_in : IN std_logic_vector(17 DOWNTO 0);
dc_in : IN std_logic_vector(11 DOWNTO 0);
scan_type : IN std_logic;
luma : IN std_logic;
huffman_out : OUT std_logic_vector(15 DOWNTO 0);
eob : IN std_logic;
rdy_out : OUT std_logic);
END huffman_en;
ARCHITECTURE translated OF huffman_en IS
-- signals
SIGNAL cntr64 : std_logic_vector(6 DOWNTO 0);
SIGNAL cl_sum_rdy : std_logic;
SIGNAL size : std_logic_vector(3 DOWNTO 0);
SIGNAL cl_sum : std_logic_vector(5 DOWNTO 0);
SIGNAL cl_sum_prev : std_logic_vector(5 DOWNTO 0);
SIGNAL codelength_dc : std_logic_vector(3 DOWNTO 0);
SIGNAL codelength_ac : std_logic_vector(4 DOWNTO 0);
SIGNAL codelength1 : std_logic_vector(4 DOWNTO 0);
SIGNAL codelength2 : std_logic_vector(4 DOWNTO 0);
SIGNAL codelength_ac1 : std_logic_vector(4 DOWNTO 0);
SIGNAL vlcode_dc : std_logic_vector(9 DOWNTO 0);
SIGNAL vlcode1 : std_logic_vector(17 DOWNTO 0);
SIGNAL vlcode2 : std_logic_vector(17 DOWNTO 0);
SIGNAL vlcode3 : std_logic_vector(17 DOWNTO 0);
SIGNAL vlcode4 : std_logic_vector(17 DOWNTO 0);
SIGNAL vlcode_ac1 : std_logic_vector(17 DOWNTO 0);
SIGNAL vlcode_ac : std_logic_vector(17 DOWNTO 0);
SIGNAL cl_sum_shift : std_logic_vector(38 DOWNTO 0);
SIGNAL full_flag1 : std_logic;
SIGNAL half_flag1 : std_logic;
SIGNAL half_flag2 : std_logic;
SIGNAL full_flag2 : std_logic;
SIGNAL half_flag3 : std_logic;
SIGNAL full_flag3 : std_logic;
SIGNAL full_flag4 : std_logic;
SIGNAL half_flag4 : std_logic;
SIGNAL full_flag5 : std_logic;
SIGNAL full_flag6 : std_logic;
SIGNAL half_flag5 : std_logic;
SIGNAL mult_out : std_logic_vector(38 DOWNTO 0);
SIGNAL mult_out_int : std_logic_vector(56 DOWNTO 0);
SIGNAL upper_reg1 : std_logic_vector(16 DOWNTO 1);
SIGNAL middle_reg1 : std_logic_vector(16 DOWNTO 1);
SIGNAL lower_reg1 : std_logic_vector(16 DOWNTO 1);
SIGNAL upper_reg2 : std_logic_vector(16 DOWNTO 1);
SIGNAL middle_reg2 : std_logic_vector(16 DOWNTO 1);
SIGNAL middle_reg3 : std_logic_vector(16 DOWNTO 1);
SIGNAL temp4,temp5 : std_logic_vector(11 DOWNTO 0);
SIGNAL temp6,temp7 : std_logic_vector(11 DOWNTO 0);
SIGNAL temp8,temp9 : std_logic_vector(11 DOWNTO 0);
SIGNAL temp10 : std_logic_vector(17 DOWNTO 0);
SIGNAL temp11 : std_logic_vector(1 DOWNTO 0);
BEGIN
--***************************************************************************
-- Find the size for the "Differential_DC" value. The differential_dc_size gives the number of
-- Find the size for the "Differential_DC" value. The differential_dc_size gives the number of
-- bits to be used to denote the DC_difference value. ram_dc_diff . Table 1 in document
-- PROCESS (CLK)
-- BEGIN
-- IF (CLK'EVENT AND CLK = '1') THEN
-- CASE dc_in IS
-- WHEN "111111111111" => size <= "0001";
-- WHEN "11111111110-" => size <= "0010";
-- WHEN "1111111110--" => size <= "0011";
-- WHEN "111111110---" => size <= "0100";
-- WHEN "11111110----" => size <= "0101";
-- WHEN "1111110-----" => size <= "0110";
-- WHEN "111110------" => size <= "0111";
-- WHEN "11110-------" => size <= "1000";
-- WHEN "1110--------" => size <= "1001";
-- WHEN "110---------" => size <= "1010";
-- WHEN "10----------" => size <= "1011";
-- WHEN "000000000000" => size <= "0000";
-- WHEN "000000000001" => size <= "0001";
-- WHEN "00000000001-" => size <= "0010";
-- WHEN "0000000001--" => size <= "0011";
-- WHEN "000000001---" => size <= "0100";
-- WHEN "00000001----" => size <= "0101";
-- WHEN "0000001-----" => size <= "0110";
-- WHEN "000001------" => size <= "0111";
-- WHEN "00001-------" => size <= "1000";
-- WHEN "0001--------" => size <= "1001";
-- WHEN "001---------" => size <= "1010";
-- WHEN "01----------" => size <= "1011";
-- WHEN OTHERS => size <= "0000";
-- END CASE;
-- END IF;
-- END PROCESS;
PROCESS (CLK)
VARIABLE size_temp : std_logic_vector(3 DOWNTO 0);
BEGIN
IF (CLK'EVENT AND CLK = '1') THEN
IF (std_match(dc_in, "111111111111")) THEN
size_temp := "0001";
ELSIF (std_match(dc_in, "11111111110-")) THEN
size_temp := "0010";
ELSIF (std_match(dc_in, "1111111110--")) THEN
size_temp := "0011";
ELSIF (std_match(dc_in, "111111110---")) THEN
size_temp := "0100";
ELSIF (std_match(dc_in, "11111110----")) THEN
size_temp := "0101";
ELSIF (std_match(dc_in, "1111110-----")) THEN
size_temp := "0110";
ELSIF (std_match(dc_in, "111110------")) THEN
size_temp := "0111";
ELSIF (std_match(dc_in, "11110-------")) THEN
size_temp := "1000";
ELSIF (std_match(dc_in, "1110--------")) THEN
size_temp := "1001";
ELSIF (std_match(dc_in, "110---------")) THEN
size_temp := "1010";
ELSIF (std_match(dc_in, "10----------")) THEN
size_temp := "1011";
ELSIF (std_match(dc_in, "000000000000")) THEN
size_temp := "0000";
ELSIF (std_match(dc_in, "000000000001")) THEN
size_temp := "0001";
ELSIF (std_match(dc_in, "00000000001-")) THEN
size_temp := "0010";
ELSIF (std_match(dc_in, "0000000001--")) THEN
size_temp := "0011";
ELSIF (std_match(dc_in, "000000001---")) THEN
size_temp := "0100";
ELSIF (std_match(dc_in, "00000001----")) THEN
size_temp := "0101";
ELSIF (std_match(dc_in, "0000001-----")) THEN
size_temp := "0110";
ELSIF (std_match(dc_in, "000001------")) THEN
size_temp := "0111";
ELSIF (std_match(dc_in, "00001-------")) THEN
size_temp := "1000";
ELSIF (std_match(dc_in, "0001--------")) THEN
size_temp := "1001";
ELSIF (std_match(dc_in, "001---------")) THEN
size_temp := "1010";
ELSIF (std_match(dc_in, "01----------")) THEN
size_temp := "1011";
ELSE
size_temp := "0000";
END IF;
END IF;
size <= size_temp;
END PROCESS;
--***************************************************************************
-- variable length code and the corresponding code length for DC_Differential
-- After finding the size of the DC_Differential, the variable length code used to denote it is found.
-- After finding the size of the DC_Differential, the variable length code used to denote it is found.
-- For example, if the size is 10, 10 bits are used to denote the dc_differential value and a variable
-- length code prefix of "111111110" is used along with the 10 bit value.
-- luma = 1'b1 denotes a luminance block and lume = 1'b0 denotes a chrominance block
PROCESS (CLK)
BEGIN
IF (CLK'EVENT AND CLK = '1') THEN
IF (RST = '1') THEN
vlcode_dc <= "0000000000";
codelength_dc <= "0000";
ELSE
IF (cntr64 = "0000001") THEN
CASE luma IS
WHEN '1' =>
CASE size IS --ram_dc_size1
WHEN "0000" => vlcode_dc <= "0000000100"; codelength_dc <= "0011";
WHEN "0001" => vlcode_dc <= "0000000000"; codelength_dc <= "0010";
WHEN "0010" => vlcode_dc <= "0000000001"; codelength_dc <= "0010";
WHEN "0011" => vlcode_dc <= "0000000101"; codelength_dc <= "0011";
WHEN "0100" => vlcode_dc <= "0000000110"; codelength_dc <= "0011";
WHEN "0101" => vlcode_dc <= "0000001110"; codelength_dc <= "0100";
WHEN "0110" => vlcode_dc <= "0000011110"; codelength_dc <= "0101";
WHEN "0111" => vlcode_dc <= "0000111110"; codelength_dc <= "0110";
WHEN "1000" => vlcode_dc <= "0001111110"; codelength_dc <= "0111";
WHEN "1001" => vlcode_dc <= "0011111110"; codelength_dc <= "1000";
WHEN "1010" => vlcode_dc <= "0111111110"; codelength_dc <= "1001";
WHEN "1011" => vlcode_dc <= "0111111111"; codelength_dc <= "1001";
WHEN OTHERS => vlcode_dc <= "0000000000"; codelength_dc <= "0000";
END CASE;
WHEN '0' =>
CASE size IS --ram_dc_size2
WHEN "0000" => vlcode_dc <= "0000000000"; codelength_dc <= "0010";
WHEN "0001" => vlcode_dc <= "0000000001"; codelength_dc <= "0010";
WHEN "0010" => vlcode_dc <= "0000000010"; codelength_dc <= "0010";
WHEN "0011" => vlcode_dc <= "0000000110"; codelength_dc <= "0011";
WHEN "0100" => vlcode_dc <= "0000001110"; codelength_dc <= "0100";
WHEN "0101" => vlcode_dc <= "0000011110"; codelength_dc <= "0101";
WHEN "0110" => vlcode_dc <= "0000111110"; codelength_dc <= "0110";
WHEN "0111" => vlcode_dc <= "0001111110"; codelength_dc <= "0111";
WHEN "1000" => vlcode_dc <= "0011111110"; codelength_dc <= "1000";
WHEN "1001" => vlcode_dc <= "0111111110"; codelength_dc <= "1001";
WHEN "1010" => vlcode_dc <= "1111111110"; codelength_dc <= "1010";
WHEN "1011" => vlcode_dc <= "1111111111"; codelength_dc <= "1010";
WHEN OTHERS => vlcode_dc <= "0000000000"; codelength_dc <= "0000";
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