?? keydisplay.vhd
字號(hào):
--按鍵顯示
--package mytype is
--TYPE t_key IS ('0','1','2','3','4','5','6','7');
--end mytype;
--use work.mytype.all;
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity keydisplay is
Port (
clk:in std_logic; --50M的時(shí)鐘頻率;
key0,key1,key2,key3,key4,key5,key6,key7: in std_logic ; --按鍵輸入;
led_date : out std_logic_vector(7 downto 0);
seg_sel:out std_logic_vector(3 downto 0)
);
end keydisplay;
architecture Behavioral of keydisplay is
signal count: integer range 0 to 7;
begin
process(clk,key0,key1,key2,key3,key4,key5,key6,key7)
variable cnt0,cnt1,cnt2,cnt3:integer range 0 to 5000000;
variable cnt4,cnt5,cnt6,cnt7:integer range 0 to 5000000;
begin
if (key0='1') then cnt0:=0;
elsif clk'event and clk='1' then
if cnt0>5000000 then cnt0:=0; count<=0;--按鍵消抖 100MS
else cnt0:=cnt0+1;
end if;
end if;
if (key1='1') then cnt1:=0;
elsif clk'event and clk='1' then
if cnt1>5000000 then cnt1:=0; count<=1;--按鍵消抖 100MS
else cnt1:=cnt1+1;
end if;
end if;
if (key2='1') then cnt2:=0;
elsif clk'event and clk='1' then
if cnt2>5000000 then cnt2:=0; count<=2;--按鍵消抖 100MS
else cnt2:=cnt2+1;
end if;
end if;
if (key3='1') then cnt3:=0;
elsif clk'event and clk='1' then
if cnt3>5000000 then cnt3:=0; count<=3;--按鍵消抖 100MS
else cnt3:=cnt3+1;
end if;
end if;
if (key4='1') then cnt4:=0;
elsif clk'event and clk='1' then
if cnt4>5000000 then cnt4:=0; count<=4;--按鍵消抖 100MS
else cnt4:=cnt4+1;
end if;
end if;
if (key5='1') then cnt5:=0;
elsif clk'event and clk='1' then
if cnt5>5000000 then cnt5:=0; count<=5;--按鍵消抖 100MS
else cnt5:=cnt5+1;
end if;
end if;
if (key6='1') then cnt6:=0;
elsif clk'event and clk='1' then
if cnt6>5000000 then cnt6:=0; count<=6;--按鍵消抖 100MS
else cnt6:=cnt6+1;
end if;
end if;
if (key7='1') then cnt7:=0;
elsif clk'event and clk='1' then
if cnt7>5000000 then cnt7:=0; count<=7;--按鍵消抖 100MS
else cnt7:=cnt7+1;
end if;
end if;
end process;
process(count)
begin
case count is
when 0 =>led_date<="11000000";--0
when 1 =>led_date<="11111001";--1
when 2 =>led_date<="10100100";--2
when 3 =>led_date<="10110000";--3
when 4 =>led_date<="10011001";--4
when 5 =>led_date<="10010010";--5
when 6 =>led_date<="10000010";--6
when 7 =>led_date<="11111000";--7
when others =>led_date<="11111111";
end case ;
end process;
seg_sel<="0001";--位選
end Behavioral;
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