Release 6.1i - Bitgen G.26Copyright (c) 1995-2003 Xilinx, Inc.  All rights reserved.Loading device database for application Bitgen from file "cpu.ncd".   "cpu" is an NCD, version 2.38, device xcv200, package pq240, speed -4Loading device for application Bitgen from file 'v200.nph' in environment
C:/Xilinx.Opened constraints file cpu.pcf.Thu Nov 10 17:34:42 2005C:/Xilinx/bin/nt/bitgen.exe -intstyle ise -w -g DebugBitstream:No -g Binary:no -g Gclkdel0:11111 -g Gclkdel1:11111 -g Gclkdel2:11111 -g Gclkdel3:11111 -g ConfigRate:4 -g CclkPin:PullUp -g M0Pin:PullUp -g M1Pin:PullUp -g M2Pin:PullUp -g ProgPin:PullUp -g DonePin:PullUp -g TckPin:PullUp -g TdiPin:PullUp -g TdoPin:PullUp -g TmsPin:PullUp -g UnusedPin:PullDown -g UserID:0xFFFFFFFF -g StartUpClk:JtagClk -g DONE_cycle:4 -g GTS_cycle:5 -g GSR_cycle:6 -g GWE_cycle:6 -g LCK_cycle:NoWait -g Security:None -g DonePipe:No -g DriveDone:No cpu.ncd 
Summary of Bitgen Options:
+----------------------+----------------------+
| Option Name          | Current Setting      |
+----------------------+----------------------+
| Compress             | (Not Specified)*     |
+----------------------+----------------------+
| Readback             | (Not Specified)*     |
+----------------------+----------------------+
| DebugBitstream       | No**                 |
+----------------------+----------------------+
| ConfigRate           | 4**                  |
+----------------------+----------------------+
| StartupClk           | JtagClk              |
+----------------------+----------------------+
| CclkPin              | Pullup**             |
+----------------------+----------------------+
| DonePin              | Pullup**             |
+----------------------+----------------------+
| M0Pin                | Pullup**             |
+----------------------+----------------------+
| M1Pin                | Pullup**             |
+----------------------+----------------------+
| M2Pin                | Pullup**             |
+----------------------+----------------------+
| ProgPin              | Pullup**             |
+----------------------+----------------------+
| TckPin               | Pullup**             |
+----------------------+----------------------+
| TdiPin               | Pullup**             |
+----------------------+----------------------+
| TdoPin               | Pullup               |
+----------------------+----------------------+
| TmsPin               | Pullup**             |
+----------------------+----------------------+
| UnusedPin            | Pulldown**           |
+----------------------+----------------------+
| GSR_cycle            | 6**                  |
+----------------------+----------------------+
| GWE_cycle            | 6**                  |
+----------------------+----------------------+
| GTS_cycle            | 5**                  |
+----------------------+----------------------+
| LCK_cycle            | NoWait**             |
+----------------------+----------------------+
| DONE_cycle           | 4**                  |
+----------------------+----------------------+
| Persist              | No*                  |
+----------------------+----------------------+
| DriveDone            | No**                 |
+----------------------+----------------------+
| DonePipe             | No**                 |
+----------------------+----------------------+
| Security             | None**               |
+----------------------+----------------------+
| UserID               | 0xFFFFFFFF**         |
+----------------------+----------------------+
| Gclkdel0             | 11111**              |
+----------------------+----------------------+
| Gclkdel1             | 11111**              |
+----------------------+----------------------+
| Gclkdel2             | 11111**              |
+----------------------+----------------------+
| Gclkdel3             | 11111**              |
+----------------------+----------------------+
| ActiveReconfig       | No*                  |
+----------------------+----------------------+
| ActivateGclk         | No*                  |
+----------------------+----------------------+
| PartialMask0         | (Not Specified)*     |
+----------------------+----------------------+
| PartialMask1         | (Not Specified)*     |
+----------------------+----------------------+
| PartialGclk          | (Not Specified)*     |
+----------------------+----------------------+
| PartialLeft          | (Not Specified)*     |
+----------------------+----------------------+
| PartialRight         | (Not Specified)*     |
+----------------------+----------------------+
| IEEE1532             | No*                  |
+----------------------+----------------------+
| Binary               | No**                 |
+----------------------+----------------------+
 *  Default setting.
 ** The specified setting matches the default setting.

Running DRC.WARNING:DesignRules:372 - Netcheck: Gated clock. Clock net u3_u1__n0002 is
   sourced by a combinatorial pin. This is not good design practice. Use the CE
   pin to control the loading of data into the flip-flop.WARNING:DesignRules:372 - Netcheck: Gated clock. Clock net u3__n0096 is sourced
   by a combinatorial pin. This is not good design practice. Use the CE pin to
   control the loading of data into the flip-flop.DRC detected 0 errors and 2 warnings.Creating bit map...Saving bit stream in "cpu.bit".Bitstream generation is complete.