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--B1_q0[0] is decoder:u0|q0[0] at LC_X31_Y15_N9
--operation mode is normal

B1_q0[0]_lut_out = !B1L21 & !B1L13 & !B1L51 & !B1L72;
B1_q0[0] = DFFEAS(B1_q0[0]_lut_out, GLOBAL(clk), VCC, , , , , , );


--B1_q0[1] is decoder:u0|q0[1] at LC_X31_Y15_N0
--operation mode is normal

B1_q0[1]_lut_out = !B1L13 & B1L63 & !B1L72;
B1_q0[1] = DFFEAS(B1_q0[1]_lut_out, GLOBAL(clk), VCC, , , , , , );


--B1_q0[2] is decoder:u0|q0[2] at LC_X31_Y15_N3
--operation mode is normal

B1_q0[2]_lut_out = !B1L13 & !B1L31 & !B1L72;
B1_q0[2] = DFFEAS(B1_q0[2]_lut_out, GLOBAL(clk), VCC, , , , , , );


--B1_q0[3] is decoder:u0|q0[3] at LC_X31_Y15_N6
--operation mode is normal

B1_q0[3]_lut_out = !B1L51 & !B1L23 & !B1L21 & !B1L71;
B1_q0[3] = DFFEAS(B1_q0[3]_lut_out, GLOBAL(clk), VCC, , , , , , );


--B1_q0[4] is decoder:u0|q0[4] at LC_X31_Y15_N5
--operation mode is normal

B1_q0[4]_lut_out = B1L61 # B1L43 # B1L31 # B1L81;
B1_q0[4] = DFFEAS(B1_q0[4]_lut_out, GLOBAL(clk), VCC, , , , , , );


--D1_q_a[0] is decoder:u0|altsyncram:reduce_or_rtl_0|altsyncram_a1j:auto_generated|q_a[0] at M4K_X33_Y14
--RAM Block Operation Mode: ROM
--Port A Depth: 1024, Port A Width: 2
--Port A Logical Depth: 1024, Port A Logical Width: 2
--Port A Input: Registered, Port A Output: Un-registered
D1_q_a[0]_PORT_A_address = BUS(numh[0], numh[1], numh[2], numh[3], numh[4], numh[5], numh[6], numh[7], numh[8], numh[9]);
D1_q_a[0]_PORT_A_address_reg = DFFE(D1_q_a[0]_PORT_A_address, D1_q_a[0]_clock_0, , , );
D1_q_a[0]_clock_0 = GLOBAL(clk);
D1_q_a[0]_PORT_A_data_out = MEMORY(, , D1_q_a[0]_PORT_A_address_reg, , , , , , D1_q_a[0]_clock_0, , , , , );
D1_q_a[0] = D1_q_a[0]_PORT_A_data_out[0];

--D1_q_a[1] is decoder:u0|altsyncram:reduce_or_rtl_0|altsyncram_a1j:auto_generated|q_a[1] at M4K_X33_Y14
D1_q_a[0]_PORT_A_address = BUS(numh[0], numh[1], numh[2], numh[3], numh[4], numh[5], numh[6], numh[7], numh[8], numh[9]);
D1_q_a[0]_PORT_A_address_reg = DFFE(D1_q_a[0]_PORT_A_address, D1_q_a[0]_clock_0, , , );
D1_q_a[0]_clock_0 = GLOBAL(clk);
D1_q_a[0]_PORT_A_data_out = MEMORY(, , D1_q_a[0]_PORT_A_address_reg, , , , , , D1_q_a[0]_clock_0, , , , , );
D1_q_a[1] = D1_q_a[0]_PORT_A_data_out[1];


--B1_q0[6] is decoder:u0|q0[6] at LC_X31_Y15_N8
--operation mode is normal

B1_q0[6]_lut_out = !B1L21 & !B1L43 & !B1L23 & !B1L71;
B1_q0[6] = DFFEAS(B1_q0[6]_lut_out, GLOBAL(clk), VCC, , , , , , );


--B2_q0[0] is decoder:u1|q0[0] at LC_X30_Y19_N1
--operation mode is normal

B2_q0[0]_lut_out = !B2L62 & !B2L51 & !B2L03 & !B2L21;
B2_q0[0] = DFFEAS(B2_q0[0]_lut_out, GLOBAL(clk), VCC, , , , , , );


--B2_q0[1] is decoder:u1|q0[1] at LC_X30_Y19_N6
--operation mode is normal

B2_q0[1]_lut_out = !B2L62 & !B2L61 & !B2L03 & !B2L33;
B2_q0[1] = DFFEAS(B2_q0[1]_lut_out, GLOBAL(clk), VCC, , , , , , );


--B2_q0[2] is decoder:u1|q0[2] at LC_X30_Y19_N4
--operation mode is normal

B2_q0[2]_lut_out = !B2L62 & !B2L03 & !B2L31;
B2_q0[2] = DFFEAS(B2_q0[2]_lut_out, GLOBAL(clk), VCC, , , , , , );


--B2_q0[3] is decoder:u1|q0[3] at LC_X30_Y19_N3
--operation mode is normal

B2_q0[3]_lut_out = !B2L71 & !B2L51 & !B2L13 & !B2L21;
B2_q0[3] = DFFEAS(B2_q0[3]_lut_out, GLOBAL(clk), VCC, , , , , , );


--B2_q0[4] is decoder:u1|q0[4] at LC_X30_Y19_N0
--operation mode is normal

B2_q0[4]_lut_out = B2L31 # B2L61 # B2L53 # B2L81;
B2_q0[4] = DFFEAS(B2_q0[4]_lut_out, GLOBAL(clk), VCC, , , , , , );


--E1_q_a[0] is decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|q_a[0] at M4K_X33_Y19
--RAM Block Operation Mode: ROM
--Port A Depth: 1024, Port A Width: 2
--Port A Logical Depth: 1024, Port A Logical Width: 2
--Port A Input: Registered, Port A Output: Un-registered
E1_q_a[0]_PORT_A_address = BUS(numt[0], numt[1], numt[2], numt[3], numt[4], numt[5], numt[6], numt[7], numt[8], numt[9]);
E1_q_a[0]_PORT_A_address_reg = DFFE(E1_q_a[0]_PORT_A_address, E1_q_a[0]_clock_0, , , );
E1_q_a[0]_clock_0 = GLOBAL(clk);
E1_q_a[0]_PORT_A_data_out = MEMORY(, , E1_q_a[0]_PORT_A_address_reg, , , , , , E1_q_a[0]_clock_0, , , , , );
E1_q_a[0] = E1_q_a[0]_PORT_A_data_out[0];

--E1_q_a[1] is decoder:u1|altsyncram:reduce_or_rtl_1|altsyncram_b1j:auto_generated|q_a[1] at M4K_X33_Y19
E1_q_a[0]_PORT_A_address = BUS(numt[0], numt[1], numt[2], numt[3], numt[4], numt[5], numt[6], numt[7], numt[8], numt[9]);
E1_q_a[0]_PORT_A_address_reg = DFFE(E1_q_a[0]_PORT_A_address, E1_q_a[0]_clock_0, , , );
E1_q_a[0]_clock_0 = GLOBAL(clk);
E1_q_a[0]_PORT_A_data_out = MEMORY(, , E1_q_a[0]_PORT_A_address_reg, , , , , , E1_q_a[0]_clock_0, , , , , );
E1_q_a[1] = E1_q_a[0]_PORT_A_data_out[1];


--B2_q0[6] is decoder:u1|q0[6] at LC_X30_Y19_N5
--operation mode is normal

B2_q0[6]_lut_out = !B2L71 & !B2L53 & !B2L13 & !B2L21;
B2_q0[6] = DFFEAS(B2_q0[6]_lut_out, GLOBAL(clk), VCC, , , , , , );


--B3_q0[0] is decoder:u2|q0[0] at LC_X35_Y14_N7
--operation mode is normal

B3_q0[0]_lut_out = !B3L21 & !B3L03 & !B3L62 & !B3L51;
B3_q0[0] = DFFEAS(B3_q0[0]_lut_out, GLOBAL(clk), VCC, , , , , , );


--B3_q0[1] is decoder:u2|q0[1] at LC_X35_Y14_N2
--operation mode is normal

B3_q0[1]_lut_out = !B3L62 & !B3L03 & !B3L61 & !B3L33;
B3_q0[1] = DFFEAS(B3_q0[1]_lut_out, GLOBAL(clk), VCC, , , , , , );


--B3_q0[2] is decoder:u2|q0[2] at LC_X35_Y14_N6
--operation mode is normal

B3_q0[2]_lut_out = !B3L31 & !B3L03 & !B3L62;
B3_q0[2] = DFFEAS(B3_q0[2]_lut_out, GLOBAL(clk), VCC, , , , , , );


--B3_q0[3] is decoder:u2|q0[3] at LC_X35_Y14_N0
--operation mode is normal

B3_q0[3]_lut_out = !B3L21 & !B3L51 & !B3L13 & !B3L71;
B3_q0[3] = DFFEAS(B3_q0[3]_lut_out, GLOBAL(clk), VCC, , , , , , );


--B3_q0[4] is decoder:u2|q0[4] at LC_X36_Y16_N2
--operation mode is normal

B3_q0[4]_lut_out = B3L81 # B3L53 # B3L31 # B3L61;
B3_q0[4] = DFFEAS(B3_q0[4]_lut_out, GLOBAL(clk), VCC, , , , , , );


--F1_q_a[0] is decoder:u2|altsyncram:reduce_or_rtl_2|altsyncram_c1j:auto_generated|q_a[0] at M4K_X33_Y15
--RAM Block Operation Mode: ROM
--Port A Depth: 1024, Port A Width: 2
--Port A Logical Depth: 1024, Port A Logical Width: 2
--Port A Input: Registered, Port A Output: Un-registered
F1_q_a[0]_PORT_A_address = BUS(numo[0], numo[1], numo[2], numo[3], numo[4], numo[5], numo[6], numo[7], numo[8], numo[9]);
F1_q_a[0]_PORT_A_address_reg = DFFE(F1_q_a[0]_PORT_A_address, F1_q_a[0]_clock_0, , , );
F1_q_a[0]_clock_0 = GLOBAL(clk);
F1_q_a[0]_PORT_A_data_out = MEMORY(, , F1_q_a[0]_PORT_A_address_reg, , , , , , F1_q_a[0]_clock_0, , , , , );
F1_q_a[0] = F1_q_a[0]_PORT_A_data_out[0];

--F1_q_a[1] is decoder:u2|altsyncram:reduce_or_rtl_2|altsyncram_c1j:auto_generated|q_a[1] at M4K_X33_Y15
F1_q_a[0]_PORT_A_address = BUS(numo[0], numo[1], numo[2], numo[3], numo[4], numo[5], numo[6], numo[7], numo[8], numo[9]);
F1_q_a[0]_PORT_A_address_reg = DFFE(F1_q_a[0]_PORT_A_address, F1_q_a[0]_clock_0, , , );
F1_q_a[0]_clock_0 = GLOBAL(clk);
F1_q_a[0]_PORT_A_data_out = MEMORY(, , F1_q_a[0]_PORT_A_address_reg, , , , , , F1_q_a[0]_clock_0, , , , , );
F1_q_a[1] = F1_q_a[0]_PORT_A_data_out[1];


--B3_q0[6] is decoder:u2|q0[6] at LC_X35_Y14_N3
--operation mode is normal

B3_q0[6]_lut_out = !B3L21 & !B3L13 & !B3L53 & !B3L71;
B3_q0[6] = DFFEAS(B3_q0[6]_lut_out, GLOBAL(clk), VCC, , , , , , );


--A1L43Q is lockopen~reg0 at LC_X35_Y15_N4
--operation mode is normal

A1L43Q_lut_out = !A1L37 & !A1L27 & (!A1L47);
A1L43Q = DFFEAS(A1L43Q_lut_out, GLOBAL(clk), VCC, , enable1, , , , );


--B1L91 is decoder:u0|reduce_nor~1826 at LC_X32_Y15_N4
--operation mode is normal

B1L91 = !numh[8] & !numh[9];


--B1L02 is decoder:u0|reduce_nor~1827 at LC_X32_Y14_N5
--operation mode is normal

B1L02 = !numh[7] & !numh[0] & !numh[6] & B1L91;


--B1L12 is decoder:u0|reduce_nor~1828 at LC_X31_Y14_N6
--operation mode is normal

B1L12 = !numh[1] & (!numh[2] & !numh[3]);


--B1L51 is decoder:u0|reduce_nor~4 at LC_X32_Y14_N4
--operation mode is normal

B1L51 = B1L12 & B1L02 & numh[4] & !numh[5];


--B1L22 is decoder:u0|reduce_nor~1829 at LC_X32_Y15_N2
--operation mode is normal

B1L22 = !numh[6] & !numh[9] & !numh[8] & !numh[7];


--B1L32 is decoder:u0|reduce_nor~1830 at LC_X31_Y14_N8
--operation mode is normal

B1L32 = !numh[0] & B1L22 & !numh[4] & !numh[5];


--B1L21 is decoder:u0|reduce_nor~1 at LC_X31_Y14_N0
--operation mode is normal

B1L21 = numh[1] & B1L32 & !numh[2] & !numh[3];


--B1L42 is decoder:u0|reduce_nor~1831 at LC_X32_Y14_N2
--operation mode is normal

B1L42 = numh[9] $ (numh[8]);


--B1L52 is decoder:u0|reduce_nor~1832 at LC_X31_Y14_N2
--operation mode is normal

B1L52 = numh[0] & !numh[2] & !numh[1] & !numh[3] # !numh[0] & (numh[2] & !numh[1] & !numh[3] # !numh[2] & (numh[1] $ numh[3]));


--B1L62 is decoder:u0|reduce_nor~1833 at LC_X31_Y14_N7
--operation mode is normal

B1L62 = numh[5] & (!numh[4] & B1L53) # !numh[5] & (numh[4] & (B1L53) # !numh[4] & B1L52);


--B1L72 is decoder:u0|reduce_nor~1834 at LC_X32_Y14_N8
--operation mode is normal

B1L72 = !B1L42 & (numh[6] & (numh[7]) # !numh[6] & !B1L62 & !numh[7]);


--B1L82 is decoder:u0|reduce_nor~1835 at LC_X32_Y14_N6
--operation mode is normal

B1L82 = B1L12 & !numh[0] & !numh[4] & !numh[5];


--B1L92 is decoder:u0|reduce_nor~1836 at LC_X32_Y15_N3
--operation mode is normal

B1L92 = !numh[6] & !numh[7] & (B1L82);


--B1L03 is decoder:u0|reduce_nor~1837 at LC_X32_Y15_N6
--operation mode is normal

B1L03 = !B1L82 & (numh[6] $ numh[7]);


--B1L13 is decoder:u0|reduce_nor~1838 at LC_X32_Y15_N0
--operation mode is normal

B1L13 = numh[9] & (numh[8] # !B1L92) # !numh[9] & (numh[8] & (!B1L92) # !numh[8] & B1L03);


--B1L23 is decoder:u0|reduce_nor~1839 at LC_X31_Y15_N4
--operation mode is normal

B1L23 = B1L13 # B1L72;


--B1L33 is decoder:u0|reduce_nor~1840 at LC_X31_Y14_N4
--operation mode is normal

B1L33 = !numh[1] & !numh[2] & !numh[4] & !numh[3];


--B1L61 is decoder:u0|reduce_nor~6 at LC_X32_Y15_N7
--operation mode is normal

B1L61 = numh[6] & !numh[7] & B1L91 & B1L82;


--B1L63 is decoder:u0|reduce_or~157 at LC_X31_Y15_N2
--operation mode is normal

B1L63 = !B1L61 & (!numh[5] # !B1L33 # !B1L02);


--B1L31 is decoder:u0|reduce_nor~2 at LC_X31_Y14_N3
--operation mode is normal

B1L31 = !numh[1] & B1L32 & numh[2] & !numh[3];


--B1L71 is decoder:u0|reduce_nor~7 at LC_X32_Y15_N9
--operation mode is normal

B1L71 = !numh[6] & numh[7] & B1L91 & B1L82;


--B1L81 is decoder:u0|reduce_nor~8 at LC_X32_Y15_N5
--operation mode is normal

B1L81 = !numh[9] & numh[8] & B1L92;


--B1L43 is decoder:u0|reduce_nor~1841 at LC_X31_Y14_N9
--operation mode is normal

B1L43 = numh[0] & B1L22 & B1L33 & !numh[5];


--B2L91 is decoder:u1|reduce_nor~1769 at LC_X31_Y19_N2
--operation mode is normal

B2L91 = !numt[9] & !numt[8] & !numt[6] & !numt[7];


--B2L02 is decoder:u1|reduce_nor~1770 at LC_X32_Y19_N5
--operation mode is normal

B2L02 = !numt[0] & B2L91;


--B2L12 is decoder:u1|reduce_nor~1771 at LC_X32_Y20_N0
--operation mode is normal

B2L12 = !numt[2] & !numt[1] & (!numt[3]);


--B2L51 is decoder:u1|reduce_nor~4 at LC_X32_Y19_N2
--operation mode is normal

B2L51 = numt[4] & B2L02 & !numt[5] & B2L12;


--B2L22 is decoder:u1|reduce_nor~1772 at LC_X32_Y20_N2
--operation mode is normal

B2L22 = !numt[4] & !numt[0] & !numt[5] & B2L91;


--B2L21 is decoder:u1|reduce_nor~1 at LC_X32_Y20_N3
--operation mode is normal

B2L21 = !numt[3] & numt[1] & B2L22 & !numt[2];


--B2L32 is decoder:u1|reduce_nor~1773 at LC_X31_Y19_N7
--operation mode is normal

B2L32 = numt[8] $ numt[9];


--B2L42 is decoder:u1|reduce_nor~1774 at LC_X32_Y20_N8
--operation mode is normal

B2L42 = numt[2] & !numt[1] & !numt[0] & !numt[3] # !numt[2] & (numt[1] & !numt[0] & !numt[3] # !numt[1] & (numt[0] $ numt[3]));


--B2L52 is decoder:u1|reduce_nor~1775 at LC_X32_Y20_N9
--operation mode is normal

B2L52 = numt[4] & (!numt[5] & B2L63) # !numt[4] & (numt[5] & (B2L63) # !numt[5] & B2L42);


--B2L62 is decoder:u1|reduce_nor~1776 at LC_X31_Y19_N8
--operation mode is normal

B2L62 = !B2L32 & (numt[7] & numt[6] # !numt[7] & !numt[6] & !B2L52);


--B2L72 is decoder:u1|reduce_nor~1777 at LC_X32_Y20_N5
--operation mode is normal

B2L72 = !numt[4] & !numt[0] & !numt[5] & B2L12;


--B2L82 is decoder:u1|reduce_nor~1778 at LC_X31_Y19_N3
--operation mode is normal

B2L82 = !numt[7] & !numt[6] & B2L72;


--B2L92 is decoder:u1|reduce_nor~1779 at LC_X31_Y19_N1
--operation mode is normal

B2L92 = !B2L72 & (numt[7] $ numt[6]);


--B2L03 is decoder:u1|reduce_nor~1780 at LC_X31_Y19_N5
--operation mode is normal

B2L03 = numt[8] & (numt[9] # !B2L82) # !numt[8] & (numt[9] & (!B2L82) # !numt[9] & B2L92);


--B2L13 is decoder:u1|reduce_nor~1781 at LC_X30_Y19_N8
--operation mode is normal

B2L13 = B2L62 # B2L03;


--B2L23 is decoder:u1|reduce_nor~1782 at LC_X32_Y20_N4
--operation mode is normal

B2L23 = !numt[3] & !numt[1] & !numt[2] & !numt[4];


--B2L33 is decoder:u1|reduce_nor~1783 at LC_X32_Y19_N6
--operation mode is normal

B2L33 = B2L23 & !numt[0] & numt[5] & B2L91;


--B2L43 is decoder:u1|reduce_nor~1784 at LC_X31_Y19_N6
--operation mode is normal

B2L43 = !numt[8] & !numt[9];


--B2L61 is decoder:u1|reduce_nor~6 at LC_X31_Y19_N0
--operation mode is normal

B2L61 = B2L43 & !numt[7] & numt[6] & B2L72;


--B2L31 is decoder:u1|reduce_nor~2 at LC_X32_Y20_N6
--operation mode is normal

B2L31 = !numt[3] & !numt[1] & B2L22 & numt[2];


--B2L71 is decoder:u1|reduce_nor~7 at LC_X30_Y19_N2
--operation mode is normal

B2L71 = B2L43 & numt[7] & !numt[6] & B2L72;


--B2L81 is decoder:u1|reduce_nor~8 at LC_X31_Y19_N9
--operation mode is normal

B2L81 = numt[8] & !numt[9] & B2L82;


--B2L53 is decoder:u1|reduce_nor~1785 at LC_X32_Y19_N4
--operation mode is normal

B2L53 = B2L23 & numt[0] & !numt[5] & B2L91;


--B3L91 is decoder:u2|reduce_nor~1769 at LC_X35_Y16_N1
--operation mode is normal

B3L91 = !numo[8] & !numo[7] & !numo[9] & !numo[6];


--B3L02 is decoder:u2|reduce_nor~1770 at LC_X36_Y16_N6
--operation mode is normal

B3L02 = numo[4] & !numo[1] & !numo[3] & !numo[2];


--B3L51 is decoder:u2|reduce_nor~4 at LC_X36_Y16_N3
--operation mode is normal

B3L51 = !numo[0] & !numo[5] & B3L02 & B3L91;


--B3L12 is decoder:u2|reduce_nor~1771 at LC_X36_Y16_N0
--operation mode is normal

B3L12 = !numo[0] & !numo[5] & !numo[4] & B3L91;


--B3L21 is decoder:u2|reduce_nor~1 at LC_X32_Y16_N9
--operation mode is normal

B3L21 = !numo[2] & numo[1] & !numo[3] & B3L12;


--B3L22 is decoder:u2|reduce_nor~1772 at LC_X32_Y16_N7
--operation mode is normal

B3L22 = numo[9] $ numo[8];


--B3L32 is decoder:u2|reduce_nor~1773 at LC_X32_Y16_N8
--operation mode is normal

B3L32 = numo[2] & !numo[1] & !numo[3] & !numo[0] # !numo[2] & (numo[1] & !numo[3] & !numo[0] # !numo[1] & (numo[3] $ numo[0]));


--B3L42 is decoder:u2|reduce_nor~1774 at LC_X36_Y16_N1
--operation mode is normal

B3L42 = !numo[1] & !numo[3] & !numo[2];


--B3L52 is decoder:u2|reduce_nor~1775 at LC_X32_Y16_N6
--operation mode is normal

B3L52 = numo[4] & (!numo[5] & B3L63) # !numo[4] & (numo[5] & (B3L63) # !numo[5] & B3L32);


--B3L62 is decoder:u2|reduce_nor~1776 at LC_X32_Y16_N4
--operation mode is normal

B3L62 = !B3L22 & (numo[6] & numo[7] # !numo[6] & !numo[7] & !B3L52);


--B3L72 is decoder:u2|reduce_nor~1777 at LC_X36_Y16_N9
--operation mode is normal

B3L72 = !numo[4] & !numo[5] & !numo[0] & B3L42;


--B3L82 is decoder:u2|reduce_nor~1778 at LC_X35_Y16_N8
--operation mode is normal

B3L82 = !numo[6] & !numo[7] & B3L72;


--B3L92 is decoder:u2|reduce_nor~1779 at LC_X35_Y16_N2
--operation mode is normal

B3L92 = !B3L72 & (numo[6] $ numo[7]);


--B3L03 is decoder:u2|reduce_nor~1780 at LC_X35_Y16_N3
--operation mode is normal

B3L03 = numo[8] & (numo[9] # !B3L82) # !numo[8] & (numo[9] & !B3L82 # !numo[9] & (B3L92));


--B3L13 is decoder:u2|reduce_nor~1781 at LC_X35_Y14_N4
--operation mode is normal

B3L13 = B3L03 # B3L62;


--B3L23 is decoder:u2|reduce_nor~1782 at LC_X36_Y16_N4
--operation mode is normal

B3L23 = !numo[4] & !numo[1] & !numo[3] & !numo[2];


--B3L33 is decoder:u2|reduce_nor~1783 at LC_X36_Y16_N8
--operation mode is normal

B3L33 = !numo[0] & B3L23 & numo[5] & B3L91;


--B3L43 is decoder:u2|reduce_nor~1784 at LC_X35_Y16_N7
--operation mode is normal

B3L43 = !numo[9] & !numo[8];


--B3L61 is decoder:u2|reduce_nor~6 at LC_X35_Y16_N5
--operation mode is normal

B3L61 = B3L43 & numo[6] & !numo[7] & B3L72;


--B3L31 is decoder:u2|reduce_nor~2 at LC_X36_Y16_N7
--operation mode is normal

B3L31 = numo[2] & !numo[1] & !numo[3] & B3L12;


--B3L71 is decoder:u2|reduce_nor~7 at LC_X35_Y16_N0
--operation mode is normal

B3L71 = B3L43 & !numo[6] & numo[7] & B3L72;