?? clock_my.sim.rpt
字號:
Simulator report for CLOCK_MY
Fri Jun 23 16:54:40 2006
Version 4.2 Build 157 12/07/2004 SJ Full Version
---------------------
; Table of Contents ;
---------------------
1. Legal Notice
2. Simulator Summary
3. Simulator Settings
4. Simulation Waveforms
5. Simulator INI Usage
6. Simulator Messages
----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2004 Altera Corporation
Any megafunction design, and related netlist (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only
to program PLD devices (but not masked PLD devices) from Altera. Any
other use of such megafunction design, netlist, support information,
device programming or simulation file, or any other related documentation
or information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner. Title to the
intellectual property, including patents, copyrights, trademarks, trade
secrets, or maskworks, embodied in any such megafunction design, netlist,
support information, device programming or simulation file, or any other
related documentation or information provided by Altera or a megafunction
partner, remains with Altera, the megafunction partner, or their respective
licensors. No other licenses, including any licenses needed under any third
party's intellectual property, are provided herein.
+-------------------+
; Simulator Summary ;
+------+------------+
; Type ; Value ;
+------+------------+
+-----------------------------------------------------------------+
; Simulator Settings ;
+-------------------------------------------------------+---------+
; Option ; Setting ;
+-------------------------------------------------------+---------+
; Simulation mode ; Timing ;
; Start time ; 0ns ;
; Add pins automatically to simulation output waveforms ; On ;
; Check outputs ; Off ;
; Report simulation coverage ; On ;
; Detect setup and hold time violations ; Off ;
; Detect glitches ; Off ;
; Automatically save/load simulation netlist ; Off ;
; Disable timing delays in Timing Simulation ; Off ;
; Generate Signal Activity File ; Off ;
+-------------------------------------------------------+---------+
+----------------------+
; Simulation Waveforms ;
+----------------------+
Waveform report data cannot be output to ASCII.
Please use Quartus II to view the waveform report data.
+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage ;
+--------+------------+
+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
Info: Version 4.2 Build 157 12/07/2004 SJ Full Version
Info: Processing started: Fri Jun 23 16:54:38 2006
Info: Command: quartus_sim --import_settings_files=on --export_settings_files=off CLOCK_MY -c CLOCK_MY
Error: Can't continue simulation because delay annotation information for design is missing
Error: Quartus II Simulator was unsuccessful. 1 error, 0 warnings
Error: Processing ended: Fri Jun 23 16:54:40 2006
Error: Elapsed time: 00:00:04
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