--LB1L43 is data_rom:u1|altsyncram:altsyncram_component|altsyncram_dcv:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2]~59
--operation mode is arithmetic

LB1L43 = AMPP_FUNCTION(LB1_ram_rom_data_shift_cntr_reg[2], LB1L41);


--LB1_ram_rom_data_shift_cntr_reg[3] is data_rom:u1|altsyncram:altsyncram_component|altsyncram_dcv:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[3]
--operation mode is normal

LB1_ram_rom_data_shift_cntr_reg[3] = AMPP_FUNCTION(A1L5, LB1_ram_rom_data_shift_cntr_reg[3], !EB5_Q[3], LB1L48, LB1L43);


--LB1L49 is data_rom:u1|altsyncram:altsyncram_component|altsyncram_dcv:auto_generated|sld_mod_ram_rom:mgl_prim2|rtl~26
--operation mode is normal

LB1L49 = AMPP_FUNCTION(LB1_ram_rom_data_shift_cntr_reg[0], LB1_ram_rom_data_shift_cntr_reg[2], LB1_ram_rom_data_shift_cntr_reg[3]);


--LB1L11 is data_rom:u1|altsyncram:altsyncram_component|altsyncram_dcv:auto_generated|sld_mod_ram_rom:mgl_prim2|process1~1
--operation mode is normal

LB1L11 = AMPP_FUNCTION(EB5_Q[3], LB1_ram_rom_data_shift_cntr_reg[1], EB5_Q[1], LB1L49);


--EB5L4 is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1]~61
--operation mode is normal

EB5L4 = AMPP_FUNCTION(EB5_Q[2], EB5_Q[1]);


--LB1L36 is data_rom:u1|altsyncram:altsyncram_component|altsyncram_dcv:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]~653
--operation mode is normal

LB1L36 = AMPP_FUNCTION(EB5L4, GB1_state[4], LB1L47, LB1L11);


--LB1L46 is data_rom:u1|altsyncram:altsyncram_component|altsyncram_dcv:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_incr_addr~0
--operation mode is normal

LB1L46 = AMPP_FUNCTION(EB5_Q[1], LB1L49, LB1_ram_rom_data_shift_cntr_reg[1]);


--LB1_ram_rom_incr_addr is data_rom:u1|altsyncram:altsyncram_component|altsyncram_dcv:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_incr_addr
--operation mode is normal

LB1_ram_rom_incr_addr = AMPP_FUNCTION(LB1L46, GB1_state[8], EB5_Q[2], LB1L47);


--EB5_Q[0] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[0]
--operation mode is normal

EB5_Q[0] = AMPP_FUNCTION(A1L5, EB7_Q[0], EB3_Q[0], EB2_Q[0], C1_CLRN_SIGNAL, C1L24);


--LB1L10 is data_rom:u1|altsyncram:altsyncram_component|altsyncram_dcv:auto_generated|sld_mod_ram_rom:mgl_prim2|process0~12
--operation mode is normal

LB1L10 = AMPP_FUNCTION(GB1_state[4], LB1L47, EB5_Q[3]);


--LB1L9 is data_rom:u1|altsyncram:altsyncram_component|altsyncram_dcv:auto_generated|sld_mod_ram_rom:mgl_prim2|name_gen~33
--operation mode is normal

LB1L9 = AMPP_FUNCTION(GB1_state[4], GB1_state[3], C1_jtag_debug_mode_usr1);


--G1_WORD_SR[0] is data_rom:u1|altsyncram:altsyncram_component|altsyncram_dcv:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[0]
--operation mode is normal

G1_WORD_SR[0] = AMPP_FUNCTION(A1L5, G1L22, G1_word_counter[4], G2L15, G1L23, VCC, G1L18);


--LB1_bypass_reg_out is data_rom:u1|altsyncram:altsyncram_component|altsyncram_dcv:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out
--operation mode is normal

LB1_bypass_reg_out = AMPP_FUNCTION(A1L5, altera_internal_jtag, LB1_bypass_reg_out, C1L32, C1_CLRN_SIGNAL);


--C1L11 is sld_hub:sld_hub_inst|hub_tdo~808
--operation mode is normal

C1L11 = AMPP_FUNCTION(G1_WORD_SR[0], EB5L4, LB1_bypass_reg_out, EB5_Q[0]);


--C1L12 is sld_hub:sld_hub_inst|hub_tdo~809
--operation mode is normal

C1L12 = AMPP_FUNCTION(LB1_ram_rom_data_reg[0], EB5_Q[2], EB5_Q[1], EB5_Q[0]);


--C1L13 is sld_hub:sld_hub_inst|hub_tdo~810
--operation mode is normal

C1L13 = AMPP_FUNCTION(EB8_Q[0], LB1L9, C1L11, C1L12);


--EB3_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0]
--operation mode is normal

EB3_Q[0] = AMPP_FUNCTION(A1L5, H1L5, LB1_is_in_use_reg, EB3_Q[1], C1L21, C1_CLRN_SIGNAL, GB1_state[4], EB3L4);


--GB1L18 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~13
--operation mode is normal

GB1L18 = AMPP_FUNCTION(GB1_state[4], GB1_state[3]);


--C1L14 is sld_hub:sld_hub_inst|hub_tdo~811
--operation mode is normal

C1L14 = AMPP_FUNCTION(EB3_Q[0], C1_jtag_debug_mode_usr1, GB1L18, C1_hub_tdo);


--G3_WORD_SR[0] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0]
--operation mode is normal

G3_WORD_SR[0] = AMPP_FUNCTION(A1L5, G3L21, G2L15, G3L22, G3L23, VCC, G3L17);


--C1_HUB_BYPASS_REG is sld_hub:sld_hub_inst|HUB_BYPASS_REG
--operation mode is normal

C1_HUB_BYPASS_REG = AMPP_FUNCTION(A1L5, altera_internal_jtag, GB1_state[4], VCC);


--HB1_dffe1a[0] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_9ie:auto_generated|dffe1a[0]
--operation mode is normal

HB1_dffe1a[0] = AMPP_FUNCTION(A1L5, C1L30, EB3_Q[2], EB3_Q[1], EB3_Q[3], C1_CLRN_SIGNAL, C1L5);


--C1L15 is sld_hub:sld_hub_inst|hub_tdo~812
--operation mode is normal

C1L15 = AMPP_FUNCTION(G3_WORD_SR[0], C1_HUB_BYPASS_REG, HB1_dffe1a[0]);


--C1L16 is sld_hub:sld_hub_inst|hub_tdo~813
--operation mode is normal

C1L16 = AMPP_FUNCTION(C1L14, EB9_Q[0], LB1L9, C1L15);


--B1_bypass_reg_out is sld_signaltap:sinout|bypass_reg_out
--operation mode is normal

B1_bypass_reg_out = AMPP_FUNCTION(A1L5, altera_internal_jtag, B1_bypass_reg_out, C1_jtag_debug_mode, C1L33, !B1_reset_all);


--EB4_Q[5] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:2:IRF|Q[5]
--operation mode is normal

EB4_Q[5] = AMPP_FUNCTION(A1L5, EB6_Q[5], EB3_Q[5], EB2_Q[0], C1_CLRN_SIGNAL, C1L25);


--EB4_Q[3] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:2:IRF|Q[3]
--operation mode is normal

EB4_Q[3] = AMPP_FUNCTION(A1L5, EB6_Q[3], EB3_Q[3], EB2_Q[0], C1_CLRN_SIGNAL, C1L25);


--EB4_Q[4] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:2:IRF|Q[4]
--operation mode is normal

EB4_Q[4] = AMPP_FUNCTION(A1L5, EB6_Q[4], EB3_Q[4], EB2_Q[0], C1_CLRN_SIGNAL, C1L25);


--C1L17 is sld_hub:sld_hub_inst|hub_tdo~814
--operation mode is normal

C1L17 = AMPP_FUNCTION(B1_bypass_reg_out, EB4_Q[5], EB4_Q[3], EB4_Q[4]);


--L1_dffs[0] is sld_signaltap:sinout|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[0]
--operation mode is normal

L1_dffs[0] = AMPP_FUNCTION(A1L5, L1_dffs[1], !B1_reset_all, H1_trigger_setup_ena);


--G2_WORD_SR[0] is sld_signaltap:sinout|sld_rom_sr:crc_rom_sr|WORD_SR[0]
--operation mode is normal

G2_WORD_SR[0] = AMPP_FUNCTION(A1L5, G2_WORD_SR[1], G2L16, GB1_state[4], G3_clear_signal, VCC, G2L14);


--C1L18 is sld_hub:sld_hub_inst|hub_tdo~815
--operation mode is normal

C1L18 = AMPP_FUNCTION(EB4_Q[5], EB4_Q[3], L1_dffs[0], G2_WORD_SR[0]);


--L4_dffs[0] is sld_signaltap:sinout|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[0]
--operation mode is normal

L4_dffs[0] = AMPP_FUNCTION(A1L5, L4_dffs[1], J1_is_max_write_address_ff, B1L36, !B1_reset_all);


--C1L19 is sld_hub:sld_hub_inst|hub_tdo~816
--operation mode is normal

C1L19 = AMPP_FUNCTION(C1L17, C1L18, EB4_Q[4], L4_dffs[0]);


--EB8_Q[1] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[1]
--operation mode is normal

EB8_Q[1] = AMPP_FUNCTION(A1L5, altera_internal_jtag, EB3_Q[8], C1_CLRN_SIGNAL, C1L22);


--C1L20 is sld_hub:sld_hub_inst|hub_tdo~817
--operation mode is normal

C1L20 = AMPP_FUNCTION(EB8_Q[1], GB1_state[4], GB1_state[3], C1_jtag_debug_mode_usr1);


--GB1_state[7] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[7]
--operation mode is normal

GB1_state[7] = AMPP_FUNCTION(A1L5, A1L7, GB1_state[6], VCC);


--C1L7 is sld_hub:sld_hub_inst|GEN_SHADOW_IRF~1
--operation mode is normal

C1L7 = AMPP_FUNCTION(GB1_state[5], EB8_Q[0], C1_OK_TO_UPDATE_IR_Q);


--V1_status_out[2] is sld_signaltap:sinout|sld_ela_control:ela_control|sld_ela_seg_state_machine:sm2|status_out[2]
--operation mode is normal

V1_status_out[2] = AMPP_FUNCTION(CLK1, EB4_Q[1], !B1_reset_all);


--U1_post_trigger_count_enable is sld_signaltap:sinout|sld_ela_control:ela_control|sld_ela_state_machine:sm1|post_trigger_count_enable
--operation mode is normal

U1_post_trigger_count_enable = AMPP_FUNCTION(CLK1, J1_is_max_write_address_ff, T1L10, U1L5, !B1_reset_all);


--U1_edq is sld_signaltap:sinout|sld_ela_control:ela_control|sld_ela_state_machine:sm1|edq
--operation mode is normal

U1_edq = AMPP_FUNCTION(CLK1, EB4_Q[1], R1L1, L1_dffs[4], U1L3, !B1_reset_all);


--EB4_Q[1] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:2:IRF|Q[1]
--operation mode is normal

EB4_Q[1] = AMPP_FUNCTION(A1L5, EB6_Q[1], EB3_Q[1], EB2_Q[0], C1_CLRN_SIGNAL, C1L25);


--J1_is_max_write_address_ff is sld_signaltap:sinout|sld_acquisition_buffer:sld_acquisition_buffer_inst|is_max_write_address_ff
--operation mode is normal

J1_is_max_write_address_ff = AMPP_FUNCTION(CLK1, DB1_cout, J1_is_max_write_address_ff, !B1_reset_all);


--H1L3 is sld_signaltap:sinout|sld_ela_control:ela_control|ela_status~131
--operation mode is normal

H1L3 = AMPP_FUNCTION(U1_post_trigger_count_enable, U1_edq, EB4_Q[1], J1_is_max_write_address_ff);


--L1_dffs[5] is sld_signaltap:sinout|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[5]
--operation mode is normal

L1_dffs[5] = AMPP_FUNCTION(A1L5, L1_dffs[6], !B1_reset_all, H1_trigger_setup_ena);


--H1L4 is sld_signaltap:sinout|sld_ela_control:ela_control|ela_status~132
--operation mode is normal

H1L4 = AMPP_FUNCTION(V1_status_out[2], H1L3, L1_dffs[5]);


--LB1_ir_loaded_address_reg[1] is data_rom:u1|altsyncram:altsyncram_component|altsyncram_dcv:auto_generated|sld_mod_ram_rom:mgl_prim2|ir_loaded_address_reg[1]
--operation mode is normal