Flow Status : Successful - Wed May 03 20:28:25 2006
Quartus II Version : 5.0 Build 148 04/26/2005 SJ Full Version
Revision Name : DDSFPGA
Top-level Entity Name : DDSFPGA
Family : Cyclone
Device : EP1C3T144C8
Timing Models : Final
Met timing requirements : N/A
Total logic elements : 323
Total pins : 57
Total virtual pins : 0
Total memory bits : 8,192
Total PLLs : 0