--cnt_delay[6] is cnt_delay[6] at LC76
cnt_delay[6]_p1_out = cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0];
cnt_delay[6]_or_out = cnt_delay[6];
cnt_delay[6]_reg_input = cnt_delay[6]_p1_out $ cnt_delay[6]_or_out;
cnt_delay[6] = DFFE(cnt_delay[6]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--phase1 is phase1 at LC57
phase1_p1_out = !phase1 & !clk_div[6] & clk_div[4] & !clk_div[1] & !C1_dffs[0] & !clk_div[5] & clk_div[3] & !clk_div[7] & !clk_div[2];
phase1_or_out = phase1_p1_out;
phase1_reg_input = phase1_or_out;
phase1 = DFFE(phase1_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--phase2 is phase2 at LC58
phase2_p1_out = !phase2 & C1_dffs[0] & clk_div[5] & !clk_div[3] & !clk_div[7] & !clk_div[2] & !clk_div[6] & clk_div[4] & !clk_div[1];
phase2_or_out = phase2_p1_out;
phase2_reg_input = phase2_or_out;
phase2 = DFFE(phase2_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--phase3 is phase3 at LC60
phase3_p1_out = !phase3 & clk_div[6] & !clk_div[4] & clk_div[1] & !C1_dffs[0] & !clk_div[5] & clk_div[3] & !clk_div[7] & !clk_div[2];
phase3_or_out = phase3_p1_out;
phase3_reg_input = phase3_or_out;
phase3 = DFFE(phase3_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--cnt_delay[7] is cnt_delay[7] at LC75
cnt_delay[7]_p1_out = cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0];
cnt_delay[7]_or_out = cnt_delay[7];
cnt_delay[7]_reg_input = cnt_delay[7]_p1_out $ cnt_delay[7]_or_out;
cnt_delay[7] = DFFE(cnt_delay[7]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--A1L1 is Select~6428 at LC36
A1L1_p0_out = !A1L76Q & A1L96Q & !A1L09Q & !A1L86Q & !link;
A1L1_p1_out = !A1L76Q & !A1L96Q & A1L09Q & A1L86Q & !link;
A1L1_p2_out = !link & A1L37Q & !phase3;
A1L1_p3_out = !link & !phase3 & A1L17Q;
A1L1_p4_out = !link & !phase3 & A1L27Q;
A1L1_or_out = A1L31 # A1L1_p0_out # A1L1_p1_out # A1L1_p2_out # A1L1_p3_out # A1L1_p4_out;
A1L1 = A1L1_or_out;


--link is link at LC80
link_or_out = !A1L1;
link_reg_input = link_or_out;
link = DFFE(link_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--cnt_delay[8] is cnt_delay[8] at LC5
cnt_delay[8]_p1_out = cnt_delay[7] & cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0] & A1L59;
cnt_delay[8]_p2_out = !cnt_delay[7] & !cnt_delay[6] & !cnt_delay[5] & !cnt_delay[4] & !cnt_delay[3] & !cnt_delay[2] & !cnt_delay[1] & !cnt_delay[0] & cnt_delay[8] & cnt_delay[18] & cnt_delay[10] & cnt_delay[19] & !cnt_delay[17] & !cnt_delay[16] & !cnt_delay[15] & !cnt_delay[14] & !cnt_delay[11] & !cnt_delay[9] & cnt_delay[13] & cnt_delay[12];
cnt_delay[8]_or_out = cnt_delay[8]_p1_out # cnt_delay[8]_p2_out;
cnt_delay[8]_reg_input = cnt_delay[8]_or_out;
cnt_delay[8] = TFFE(cnt_delay[8]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--A1L47 is inner_state~4117 at SEXP24
A1L47 = EXP(!A1L76Q & !A1L86Q);


--A1L57 is inner_state~4118 at SEXP22
A1L57 = EXP(!A1L37Q & link);


--A1L67 is inner_state~4119 at SEXP21
A1L67 = EXP(!A1L27Q & phase3);


--A1L77 is inner_state~4120 at SEXP20
A1L77 = EXP(!A1L76Q & A1L86Q);


--A1L17Q is inner_state~113 at LC19
A1L17Q_p0_out = !A1L07Q & A1L27Q & A1L37Q & phase3 & !A1L86Q & !A1L96Q;
A1L17Q_p1_out = A1L57 & !A1L17Q & !A1L07Q;
A1L17Q_p2_out = !A1L17Q & A1L67;
A1L17Q_p3_out = !A1L07Q & A1L77 & A1L27Q & A1L37Q & phase3 & A1L09Q;
A1L17Q_p4_out = A1L27Q & A1L37Q & phase3 & A1L09Q & A1L76Q & !A1L96Q;
A1L17Q_or_out = A1L28 # A1L17Q_p0_out # A1L17Q_p1_out # A1L17Q_p2_out # A1L17Q_p3_out # A1L17Q_p4_out;
A1L17Q_reg_input = !(A1L17Q_or_out);
A1L17Q = DFFE(A1L17Q_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--cnt_delay[9] is cnt_delay[9] at LC68
cnt_delay[9]_p1_out = cnt_delay[8] & cnt_delay[7] & cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0];
cnt_delay[9]_or_out = cnt_delay[9];
cnt_delay[9]_reg_input = cnt_delay[9]_p1_out $ cnt_delay[9]_or_out;
cnt_delay[9] = DFFE(cnt_delay[9]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--A1L37Q is inner_state~115 at LC56
A1L37Q_p0_out = A1L37Q & A1L09Q & A1L76Q & phase3 & !A1L17Q;
A1L37Q_p1_out = !A1L37Q & !A1L27Q;
A1L37Q_p2_out = A1L37Q & !A1L09Q & !A1L96Q & !A1L76Q & phase3 & !A1L17Q;
A1L37Q_p3_out = A1L37Q & A1L09Q & phase3 & !A1L17Q & !A1L86Q;
A1L37Q_p4_out = A1L37Q & !A1L96Q & phase3 & !A1L17Q & !A1L86Q;
A1L37Q_or_out = A1L48 # A1L37Q_p0_out # A1L37Q_p1_out # A1L37Q_p2_out # A1L37Q_p3_out # A1L37Q_p4_out;
A1L37Q_reg_input = !(A1L37Q_or_out);
A1L37Q = DFFE(A1L37Q_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--cnt_delay[10] is cnt_delay[10] at LC16
cnt_delay[10]_p1_out = cnt_delay[9] & cnt_delay[8] & cnt_delay[7] & cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0] & A1L59;
cnt_delay[10]_p2_out = !cnt_delay[9] & cnt_delay[8] & !cnt_delay[7] & !cnt_delay[6] & !cnt_delay[5] & !cnt_delay[4] & !cnt_delay[3] & !cnt_delay[2] & !cnt_delay[1] & !cnt_delay[0] & cnt_delay[10] & cnt_delay[18] & cnt_delay[19] & !cnt_delay[17] & !cnt_delay[16] & !cnt_delay[15] & !cnt_delay[14] & !cnt_delay[11] & cnt_delay[13] & cnt_delay[12];
cnt_delay[10]_or_out = cnt_delay[10]_p1_out # cnt_delay[10]_p2_out;
cnt_delay[10]_reg_input = cnt_delay[10]_or_out;
cnt_delay[10] = TFFE(cnt_delay[10]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--cnt_delay[11] is cnt_delay[11] at LC4
cnt_delay[11]_p1_out = cnt_delay[10] & cnt_delay[9] & cnt_delay[8] & cnt_delay[7] & cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0];
cnt_delay[11]_or_out = cnt_delay[11];
cnt_delay[11]_reg_input = cnt_delay[11]_p1_out $ cnt_delay[11]_or_out;
cnt_delay[11] = DFFE(cnt_delay[11]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--A1L87 is inner_state~4136 at SEXP54
A1L87 = EXP(!A1L09Q & !phase1);


--A1L97 is inner_state~4137 at SEXP52
A1L97 = EXP(!A1L37Q & !A1L17Q);


--A1L08 is inner_state~4138 at SEXP49
A1L08 = EXP(A1L96Q & !A1L09Q);


--A1L27Q is inner_state~114 at LC51
A1L27Q_p0_out = A1L27Q & !A1L07Q & A1L97 & phase3 & A1L08 & !A1L86Q;
A1L27Q_p1_out = !A1L09Q & !A1L19Q;
A1L27Q_p2_out = A1L87 & !A1L27Q & !A1L76Q & !A1L37Q & A1L07Q;
A1L27Q_p3_out = !A1L09Q & A1L27Q & !A1L76Q & !A1L07Q & A1L97 & !A1L96Q & phase3;
A1L27Q_p4_out = A1L09Q & A1L27Q & A1L76Q & !A1L07Q & A1L97 & phase3;
A1L27Q_or_out = A1L68 # A1L27Q_p0_out # A1L27Q_p1_out # A1L27Q_p2_out # A1L27Q_p3_out # A1L27Q_p4_out;
A1L27Q_reg_input = !(A1L27Q_or_out);
A1L27Q = DFFE(A1L27Q_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--A1L07Q is inner_state~112 at LC53
A1L07Q_p0_out = !A1L19Q & A1L07Q & !A1L09Q;
A1L07Q_p1_out = A1L76Q & A1L37Q & phase3 & !A1L17Q & A1L27Q & !A1L86Q & A1L19Q & !A1L07Q;
A1L07Q_p2_out = A1L37Q & phase3 & !A1L17Q & A1L27Q & !A1L86Q & A1L19Q & !A1L07Q & !A1L96Q;
A1L07Q_p3_out = phase3 & A1L17Q & !A1L27Q & !A1L86Q & A1L07Q & !A1L96Q;
A1L07Q_p4_out = phase3 & A1L17Q & !A1L27Q & !A1L86Q & A1L07Q & A1L09Q;
A1L07Q_or_out = A1L78 # A1L07Q_p0_out # A1L07Q_p1_out # A1L07Q_p2_out # A1L07Q_p3_out # A1L07Q_p4_out;
A1L07Q_reg_input = A1L07Q_or_out;
A1L07Q = TFFE(A1L07Q_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--cnt_delay[12] is cnt_delay[12] at LC9
cnt_delay[12]_p1_out = cnt_delay[11] & cnt_delay[10] & cnt_delay[9] & cnt_delay[8] & cnt_delay[7] & cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0] & A1L59;
cnt_delay[12]_p2_out = !cnt_delay[11] & cnt_delay[10] & !cnt_delay[9] & cnt_delay[8] & !cnt_delay[7] & !cnt_delay[6] & !cnt_delay[5] & !cnt_delay[4] & !cnt_delay[3] & !cnt_delay[2] & !cnt_delay[1] & !cnt_delay[0] & cnt_delay[12] & cnt_delay[18] & cnt_delay[19] & !cnt_delay[17] & !cnt_delay[16] & !cnt_delay[15] & !cnt_delay[14] & cnt_delay[13];
cnt_delay[12]_or_out = cnt_delay[12]_p1_out # cnt_delay[12]_p2_out;
cnt_delay[12]_reg_input = cnt_delay[12]_or_out;
cnt_delay[12] = TFFE(cnt_delay[12]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--cnt_delay[13] is cnt_delay[13] at LC11
cnt_delay[13]_p1_out = cnt_delay[12] & cnt_delay[11] & cnt_delay[10] & cnt_delay[9] & cnt_delay[8] & cnt_delay[7] & cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0] & A1L59;
cnt_delay[13]_p2_out = cnt_delay[12] & !cnt_delay[11] & cnt_delay[10] & !cnt_delay[9] & cnt_delay[8] & !cnt_delay[7] & !cnt_delay[6] & !cnt_delay[5] & !cnt_delay[4] & !cnt_delay[3] & !cnt_delay[2] & !cnt_delay[1] & !cnt_delay[0] & cnt_delay[13] & cnt_delay[18] & cnt_delay[19] & !cnt_delay[17] & !cnt_delay[16] & !cnt_delay[15] & !cnt_delay[14];
cnt_delay[13]_or_out = cnt_delay[13]_p1_out # cnt_delay[13]_p2_out;
cnt_delay[13]_reg_input = cnt_delay[13]_or_out;
cnt_delay[13] = TFFE(cnt_delay[13]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--A1L96Q is i2c_state~52 at LC48
A1L96Q_p1_out = A1L76Q & !A1L86Q & A1L07Q & A1L17Q & A1L09Q & phase3 & !A1L96Q;
A1L96Q_p2_out = !A1L09Q & A1L96Q & !A1L19Q;
A1L96Q_p3_out = !A1L76Q & A1L07Q & A1L17Q & A1L09Q & phase3 & A1L96Q;
A1L96Q_p4_out = A1L86Q & A1L07Q & A1L17Q & A1L09Q & phase3 & A1L96Q;
A1L96Q_or_out = A1L96Q_p1_out # A1L96Q_p2_out # A1L96Q_p3_out # A1L96Q_p4_out;
A1L96Q_reg_input = A1L96Q_or_out;
A1L96Q = TFFE(A1L96Q_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--cnt_delay[14] is cnt_delay[14] at LC15
cnt_delay[14]_p1_out = cnt_delay[13] & cnt_delay[12] & cnt_delay[11] & cnt_delay[10] & cnt_delay[9] & cnt_delay[8] & cnt_delay[7] & cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0];
cnt_delay[14]_or_out = cnt_delay[14];
cnt_delay[14]_reg_input = cnt_delay[14]_p1_out $ cnt_delay[14]_or_out;
cnt_delay[14] = DFFE(cnt_delay[14]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--A1L86Q is i2c_state~51 at LC46
A1L86Q_p1_out = A1L96Q & A1L07Q & A1L17Q & phase3 & A1L09Q & !A1L86Q;
A1L86Q_p2_out = A1L07Q & A1L17Q & phase3 & !A1L09Q & !A1L86Q & A1L76Q & A1L19Q;
A1L86Q_p3_out = !A1L09Q & A1L86Q & !A1L19Q;
A1L86Q_or_out = A1L86Q_p1_out # A1L86Q_p2_out # A1L86Q_p3_out;
A1L86Q_reg_input = A1L86Q_or_out;
A1L86Q = TFFE(A1L86Q_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--cnt_delay[15] is cnt_delay[15] at LC14
cnt_delay[15]_p1_out = cnt_delay[14] & cnt_delay[13] & cnt_delay[12] & cnt_delay[11] & cnt_delay[10] & cnt_delay[9] & cnt_delay[8] & cnt_delay[7] & cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0];
cnt_delay[15]_or_out = cnt_delay[15];
cnt_delay[15]_reg_input = cnt_delay[15]_p1_out $ cnt_delay[15]_or_out;
cnt_delay[15] = DFFE(cnt_delay[15]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--A1L76Q is i2c_state~50 at LC47
A1L76Q_p0_out = !A1L09Q & !A1L86Q & A1L07Q & A1L17Q & phase3 & A1L76Q;
A1L76Q_p1_out = A1L09Q & !A1L86Q & A1L07Q & A1L17Q & phase3 & !A1L96Q;
A1L76Q_p2_out = !A1L86Q & A1L07Q & A1L17Q & phase3 & !A1L96Q & A1L19Q;
A1L76Q_p3_out = A1L09Q & A1L07Q & A1L17Q & phase3 & A1L96Q & !A1L76Q;
A1L76Q_p4_out = !A1L09Q & !A1L19Q & A1L76Q;
A1L76Q_or_out = A1L76Q_p0_out # A1L76Q_p1_out # A1L76Q_p2_out # A1L76Q_p3_out # A1L76Q_p4_out;
A1L76Q_reg_input = A1L76Q_or_out;
A1L76Q = TFFE(A1L76Q_reg_input, GLOBAL(clk), GLOBAL(rst), , );


--cnt_delay[16] is cnt_delay[16] at LC13
cnt_delay[16]_p1_out = cnt_delay[15] & cnt_delay[14] & cnt_delay[13] & cnt_delay[12] & cnt_delay[10] & cnt_delay[11] & cnt_delay[8] & cnt_delay[9] & cnt_delay[7] & cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0];
cnt_delay[16]_or_out = cnt_delay[16]_p1_out;
cnt_delay[16]_reg_input = cnt_delay[16]_or_out;
cnt_delay[16] = TFFE(cnt_delay[16]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--cnt_delay[17] is cnt_delay[17] at LC10
cnt_delay[17]_p1_out = cnt_delay[16] & cnt_delay[15] & cnt_delay[14] & cnt_delay[13] & cnt_delay[12] & cnt_delay[10] & cnt_delay[11] & cnt_delay[8] & cnt_delay[9] & cnt_delay[7] & cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0];
cnt_delay[17]_or_out = cnt_delay[17];
cnt_delay[17]_reg_input = cnt_delay[17]_p1_out $ cnt_delay[17]_or_out;
cnt_delay[17] = DFFE(cnt_delay[17]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--cnt_delay[18] is cnt_delay[18] at LC6
cnt_delay[18]_p1_out = cnt_delay[17] & cnt_delay[16] & cnt_delay[15] & cnt_delay[14] & cnt_delay[13] & cnt_delay[12] & cnt_delay[10] & cnt_delay[11] & cnt_delay[8] & cnt_delay[9] & cnt_delay[7] & cnt_delay[6] & cnt_delay[5] & cnt_delay[4] & cnt_delay[3] & cnt_delay[2] & cnt_delay[1] & cnt_delay[0] & A1L59;
cnt_delay[18]_p2_out = !cnt_delay[17] & !cnt_delay[16] & !cnt_delay[15] & !cnt_delay[14] & cnt_delay[13] & cnt_delay[12] & cnt_delay[10] & !cnt_delay[11] & cnt_delay[8] & !cnt_delay[9] & !cnt_delay[7] & !cnt_delay[6] & !cnt_delay[5] & !cnt_delay[4] & !cnt_delay[3] & !cnt_delay[2] & !cnt_delay[1] & !cnt_delay[0] & cnt_delay[18] & cnt_delay[19];
cnt_delay[18]_or_out = cnt_delay[18]_p1_out # cnt_delay[18]_p2_out;
cnt_delay[18]_reg_input = cnt_delay[18]_or_out;
cnt_delay[18] = TFFE(cnt_delay[18]_reg_input, GLOBAL(clk), GLOBAL(rst), , start_delaycnt);


--A1L29 is main_state~600 at SEXP6
A1L29 = EXP(A1L76Q & A1L86Q & A1L27Q & phase3);


--A1L39 is main_state~601 at SEXP5
A1L39 = EXP(A1L76Q & A1L27Q & phase3);


--A1L49 is main_state~602 at SEXP4
A1L49 = EXP(sda_buf & phase1 & A1L17Q);