A1L111_p1_out = A1L27Q & readData_reg[3] & phase1 & A1L09Q & A1L76Q & A1L86Q & !A1L07Q & !readData_reg[4];
A1L111_p2_out = readData_reg[3] & phase1 & A1L09Q & A1L76Q & A1L86Q & !A1L07Q & !readData_reg[4] & A1L17Q;
A1L111_p3_out = !A1L27Q & readData_reg[3] & phase1 & A1L09Q & A1L76Q & A1L86Q & A1L07Q & !readData_reg[4] & !A1L17Q;
A1L111 = A1L111_p1_out # A1L111_p2_out # A1L111_p3_out;


--A1L311 is readData_reg[4]~207 at LC104
A1L311_p1_out = A1L27Q & readData_reg[4] & phase1 & A1L09Q & A1L76Q & A1L86Q & !A1L07Q & !readData_reg[5];
A1L311_p2_out = readData_reg[4] & phase1 & A1L09Q & A1L76Q & A1L86Q & !A1L07Q & !readData_reg[5] & A1L17Q;
A1L311_p3_out = !A1L27Q & readData_reg[4] & phase1 & A1L09Q & A1L76Q & A1L86Q & A1L07Q & !readData_reg[5] & !A1L17Q;
A1L311 = A1L311_p1_out # A1L311_p2_out # A1L311_p3_out;


--A1L511 is readData_reg[5]~211 at LC111
A1L511_p1_out = A1L27Q & readData_reg[5] & phase1 & A1L09Q & A1L76Q & A1L86Q & !A1L07Q & !readData_reg[6];
A1L511_p2_out = readData_reg[5] & phase1 & A1L09Q & A1L76Q & A1L86Q & !A1L07Q & !readData_reg[6] & A1L17Q;
A1L511_p3_out = !A1L27Q & readData_reg[5] & phase1 & A1L09Q & A1L76Q & A1L86Q & A1L07Q & !readData_reg[6] & !A1L17Q;
A1L511 = A1L511_p1_out # A1L511_p2_out # A1L511_p3_out;


--A1L711 is readData_reg[6]~215 at LC109
A1L711_p1_out = A1L27Q & readData_reg[6] & phase1 & A1L09Q & A1L76Q & A1L86Q & !A1L07Q & !readData_reg[7];
A1L711_p2_out = readData_reg[6] & phase1 & A1L09Q & A1L76Q & A1L86Q & !A1L07Q & !readData_reg[7] & A1L17Q;
A1L711_p3_out = !A1L27Q & readData_reg[6] & phase1 & A1L09Q & A1L76Q & A1L86Q & A1L07Q & !readData_reg[7] & !A1L17Q;
A1L711 = A1L711_p1_out # A1L711_p2_out # A1L711_p3_out;


--A1L731 is reduce_or~2516 at LC107
A1L731_p0_out = A1L46Q & readData_reg[5];
A1L731_p1_out = !readData_reg[2] & !readData_reg[1] & !readData_reg[3] & !A1L66Q;
A1L731_p2_out = !writeData_reg[1] & !writeData_reg[3] & writeData_reg[2] & !A1L46Q;
A1L731_p3_out = !writeData_reg[1] & writeData_reg[3] & !writeData_reg[2] & !A1L46Q & writeData_reg[0];
A1L731_p4_out = A1L46Q & readData_reg[6];
A1L731 = A1L241 # A1L731_p0_out # A1L731_p1_out # A1L731_p2_out # A1L731_p3_out # A1L731_p4_out;


--A1L831 is reduce_or~2520 at LC84
A1L831_p0_out = A1L46Q & !A1L66Q & !readData_reg[1] & !readData_reg[4] & !readData_reg[5] & !readData_reg[6] & !readData_reg[7] & !readData_reg[2];
A1L831_p1_out = writeData_reg[1] & !writeData_reg[0] & writeData_reg[3] & !A1L46Q & A1L66Q;
A1L831_p2_out = !writeData_reg[1] & !writeData_reg[0] & !writeData_reg[3] & !A1L46Q & A1L66Q & !writeData_reg[2];
A1L831_p3_out = writeData_reg[1] & writeData_reg[0] & !A1L46Q & A1L66Q & !writeData_reg[2];
A1L831_p4_out = writeData_reg[0] & writeData_reg[3] & !A1L46Q & A1L66Q & !writeData_reg[2];
A1L831 = A1L831_p0_out # A1L831_p1_out # A1L831_p2_out # A1L831_p3_out # A1L831_p4_out;


--A1L931 is reduce_or~2526 at LC92
A1L931_p1_out = !readData_reg[3] & readData_reg[2] & !readData_reg[0] & !readData_reg[1] & A1L46Q & !A1L66Q;
A1L931_p2_out = !A1L46Q & A1L66Q & !writeData_reg[2] & !writeData_reg[3] & !writeData_reg[1] & writeData_reg[0];
A1L931_p3_out = readData_reg[2] & readData_reg[0] & readData_reg[1] & A1L46Q & !A1L66Q;
A1L931_p4_out = !A1L46Q & A1L66Q & !writeData_reg[2] & writeData_reg[1] & !writeData_reg[0];
A1L931 = A1L931_p1_out # A1L931_p2_out # A1L931_p3_out # A1L931_p4_out;


--A1L041 is reduce_or~2531 at LC87
A1L041_p1_out = !readData_reg[0] & !readData_reg[3] & !readData_reg[1] & readData_reg[2] & A1L46Q & !A1L66Q;
A1L041_p2_out = !A1L46Q & A1L66Q & writeData_reg[0] & !writeData_reg[3] & !writeData_reg[1] & !writeData_reg[2];
A1L041_p3_out = readData_reg[0] & !readData_reg[3] & !readData_reg[1] & !readData_reg[2] & A1L46Q & !A1L66Q;
A1L041_p4_out = !A1L46Q & A1L66Q & !writeData_reg[0] & !writeData_reg[3] & !writeData_reg[1] & writeData_reg[2];
A1L041 = A1L041_p1_out # A1L041_p2_out # A1L041_p3_out # A1L041_p4_out;


--A1L141 is reduce_or~2536 at LC90
A1L141_p0_out = A1L46Q & !A1L66Q & readData_reg[4];
A1L141_p1_out = readData_reg[0] & !readData_reg[1] & !readData_reg[2] & A1L46Q & !A1L66Q;
A1L141_p2_out = !A1L46Q & A1L66Q & writeData_reg[2] & !writeData_reg[1] & !writeData_reg[0];
A1L141_p3_out = !readData_reg[1] & readData_reg[2] & A1L46Q & !A1L66Q & !readData_reg[3];
A1L141_p4_out = !A1L46Q & A1L66Q & !writeData_reg[2] & !writeData_reg[1] & !writeData_reg[3];
A1L141 = A1L141_p0_out # A1L141_p1_out # A1L141_p2_out # A1L141_p3_out # A1L141_p4_out;


--~GND~0 is ~GND~0 at LC37
~GND~0_or_out = GND;
~GND~0 = ~GND~0_or_out;


--~VCC~0 is ~VCC~0 at LC94
~VCC~0_or_out = GND;
~VCC~0 = !(~VCC~0_or_out);


--A1L2 is Select~6432sexp at SEXP37
A1L2 = EXP(sda_buf & !A1L76Q & A1L86Q);


--A1L9 is Select~6471sexp1 at SEXP38
A1L9 = EXP(sda_buf & A1L76Q & A1L86Q);


--A1L01 is Select~6471sexp2 at SEXP39
A1L01 = EXP(sda_buf & A1L96Q);


--A1L241 is reduce_or~2546 at LC106
A1L241_p1_out = readData_reg[4] & A1L46Q;
A1L241_p2_out = A1L46Q & A1L66Q;
A1L241 = A1L241_p1_out # A1L241_p2_out;


--clk is clk at PIN_83
--operation mode is input

clk = INPUT();


--rst is rst at PIN_1
--operation mode is input

rst = INPUT();


--data_in[0] is data_in[0] at PIN_24
--operation mode is input

data_in[0] = INPUT();


--data_in[1] is data_in[1] at PIN_22
--operation mode is input

data_in[1] = INPUT();


--data_in[2] is data_in[2] at PIN_21
--operation mode is input

data_in[2] = INPUT();


--data_in[3] is data_in[3] at PIN_20
--operation mode is input

data_in[3] = INPUT();


--wr_input is wr_input at PIN_35
--operation mode is input

wr_input = INPUT();


--rd_input is rd_input at PIN_36
--operation mode is input

rd_input = INPUT();


--A1L051 is sda~1 at PIN_29
--operation mode is bidir

A1L051 = sda;

--sda is sda at PIN_29
--operation mode is bidir

sda_tri_out = TRI(sda_buf, link);
sda = BIDIR(sda_tri_out);


--lowbit is lowbit at PIN_30
--operation mode is output

lowbit = OUTPUT(~GND~0);


--seg_data[0] is seg_data[0] at PIN_61
--operation mode is output

seg_data[0] = OUTPUT(~VCC~0);


--en[0] is en[0] at PIN_75
--operation mode is output

en[0] = OUTPUT(A1L46Q);


--en[1] is en[1] at PIN_74
--operation mode is output

en[1] = OUTPUT(A1L66Q);


--scl is scl at PIN_28
--operation mode is output

scl = OUTPUT(A1L741Q);


--seg_data[1] is seg_data[1] at PIN_64
--operation mode is output

seg_data[1] = OUTPUT(A1L341);


--seg_data[2] is seg_data[2] at PIN_56
--operation mode is output

seg_data[2] = OUTPUT(A1L821);


--seg_data[5] is seg_data[5] at PIN_63
--operation mode is output

seg_data[5] = OUTPUT(A1L231);


--seg_data[6] is seg_data[6] at PIN_55
--operation mode is output

seg_data[6] = OUTPUT(A1L331);


--seg_data[3] is seg_data[3] at PIN_58
--operation mode is output

seg_data[3] = OUTPUT(A1L631);


--seg_data[4] is seg_data[4] at PIN_60
--operation mode is output

seg_data[4] = OUTPUT(A1L431);


--seg_data[7] is seg_data[7] at PIN_57
--operation mode is output

seg_data[7] = OUTPUT(A1L531);






--A1L341 is reduce_or~2547 at LC99
A1L341_or_out = A1L911;
A1L341 = A1L341_or_out;


--A1L441 is reduce_or~2548 at SEXP87
A1L441 = EXP(!readData_reg[4] & !readData_reg[5] & !readData_reg[6] & !readData_reg[7]);