?? dac_ctrl.psm
字號:
;KCPSM3 Program - SPI Control of D/A converter on Spartan-3E Starter Kit.
;
;
;Ken Chapman - Xilinx Ltd
;
;Version v1.00 - 24th November 2005
;
;This program uses an 8KHz interrupt to generate test waveforms on the
;4 analogue outputs provided by the Linear Technology LTC2624 device.
;
;As well as the port connections vital to communication with the UART and the SPI
;FLASH memory, there are additional port connections used to disable the other
;devices sharing the SPI bus on the Starter Kit board. Although these could have been
;controlled at the hardware level, they are included in this code to aid
;future investigations of communication with the other SPI devices using PicoBlaze.
;
;Connections to the LEDs, switches and press buttons are provided to aid
;development and enable further experiments. Otherwise know as having fun!
;
;Port definitions
;
;
CONSTANT SPI_control_port, 08 ;SPI clock and chip selects
CONSTANT SPI_sck, 01 ; SCK - bit0
CONSTANT SPI_rom_cs, 02 ; serial rom select - bit1
CONSTANT SPI_spare_control, 04 ; spare - bit2
CONSTANT SPI_amp_cs, 08 ; amplifier select - bit3
CONSTANT SPI_adc_conv, 10 ; A/D convert - bit4
CONSTANT SPI_dac_cs, 20 ; D/A select - bit5
CONSTANT SPI_amp_shdn, 40 ; amplifier SHDN - bit6
CONSTANT SPI_dac_clr, 80 ; D/A clear - bit7
;
CONSTANT SPI_output_port, 04 ;SPI data output
CONSTANT SPI_sdo, 80 ; SDO - bit7
;
CONSTANT SPI_input_port, 01 ;SPI data input
CONSTANT SPI_sdi, 80 ; SDI - bit7
CONSTANT SPI_amp_sdi, 40 ; amplifier SDI - bit6
;
;
CONSTANT LED_port, 80 ;8 simple LEDs
CONSTANT LED0, 01 ; LED 0 - bit0
CONSTANT LED1, 02 ; 1 - bit1
CONSTANT LED2, 04 ; 2 - bit2
CONSTANT LED3, 08 ; 3 - bit3
CONSTANT LED4, 10 ; 4 - bit4
CONSTANT LED5, 20 ; 5 - bit5
CONSTANT LED6, 40 ; 6 - bit6
CONSTANT LED7, 80 ; 7 - bit7
;
;
CONSTANT switch_port, 00 ;Read switches and press buttons
CONSTANT BTN_north, 01 ; Buttons North - bit0
CONSTANT BTN_east, 02 ; East - bit1
CONSTANT BTN_south, 04 ; South - bit2
CONSTANT BTN_west, 08 ; West - bit3
CONSTANT switch0, 10 ; Switches 0 - bit4
CONSTANT switch1, 20 ; 1 - bit5
CONSTANT switch2, 40 ; 2 - bit6
CONSTANT switch3, 80 ; 3 - bit7
;
;
;
;
;Special Register usage
;
;
;Useful data constants
;
;
;Constant to define a software delay of 1us. This must be adjusted to reflect the
;clock applied to KCPSM3. Every instruction executes in 2 clock cycles making the
;calculation highly predictable. The '6' in the following equation even allows for
;'CALL delay_1us' instruction in the initiating code.
;
; delay_1us_constant = (clock_rate - 6)/4 Where 'clock_rate' is in MHz
;
;Example: For a 50MHz clock the constant value is (10-6)/4 = 11 (0B Hex).
;For clock rates below 10MHz the value of 1 must be used and the operation will
;become lower than intended.
;
CONSTANT delay_1us_constant, 0B
;
;
;
;
;
;
;Scratch Pad Memory Locations
;
;Values to be written to the D/A converter
;
;
CONSTANT chan_A_lsb, 00 ;Channel A value LS-Byte
CONSTANT chan_A_msb, 01 ; MS-Byte
;
CONSTANT chan_B_lsb, 02 ;Channel B value LS-Byte
CONSTANT chan_B_msb, 03 ; MS-Byte
;
CONSTANT chan_C_lsb, 04 ;Channel C value LS-Byte
CONSTANT chan_C_msb, 05 ; MS-Byte
;
CONSTANT chan_D_lsb, 06 ;Channel D value LS-Byte
CONSTANT chan_D_msb, 07 ; MS-Byte
;
;
;Value used to synthesise a triangle wave
;
CONSTANT triangle_up_down, 08 ;Determines up or down slope
;
;Value used to synthesise a square wave
;
CONSTANT square_count, 09 ;Counts samples in square wave
;
;
;Values used to synthesise a sine wave
;
CONSTANT sine_y_lsb, 10 ;Sine wave value LS-Byte
CONSTANT sine_y_msb, 11 ; MS-Byte
CONSTANT sine_y1_lsb, 12 ;Sine wave delayed LS-Byte
CONSTANT sine_y1_msb, 13 ; MS-Byte
CONSTANT sine_k_lsb, 14 ;Sine constant LS-Byte
CONSTANT sine_k_msb, 15 ; MS-Byte
;
;
;Sample counter used to give activity indication on LEDs
;
CONSTANT sample_count_lsb, 20 ;16-bit counter LS-Byte
CONSTANT sample_count_msb, 21 ; MS-Byte
;
;Initialise the system
;
;
cold_start: CALL SPI_init ;initialise SPI bus ports
CALL init_sine_wave ;initialise sine wave synthesis values
CALL delay_1s ;bus settling delay
LOAD s0, 00 ;clear all internal D/A values
STORE s0, chan_A_lsb
STORE s0, chan_A_msb
STORE s0, chan_B_lsb
STORE s0, chan_B_msb
STORE s0, chan_C_lsb
STORE s0, chan_C_msb
STORE s0, chan_D_lsb
STORE s0, chan_D_msb
STORE s0, triangle_up_down ;initial slope is up
CALL dac_reset ;reset D/A converter on all channels
ENABLE INTERRUPT ;Interrupts define 8KHz sample rate
;
;
;The program is interrupt driven to maintain an 8KHz sample rate. The main body
;of the program waits for an interrupt to occur. The interrupt updates all four
;analogue outputs with values stored in scratch pad memory. This takes approximately
;58us of the 125us available between interrupts. The main program then prepares
;new values for the analogue outputs (in less than 67us) before waiting for the
;next interrupt.
;
;
warm_start: LOAD sF, FF ;flag set and wait for interrupt to be serviced
wait_int: COMPARE sF, FF
JUMP Z, wait_int ;interrupt clears the flag
;
;
;Channel A is a square wave of 2KHz.
;
;This is formed from the 2KHz square wave on channel C and demonstrates that the
;D/A converter echoes the previously sent 32-bit command word.
;
;Following the interrupt service routine (ISR), the register set [s9,s8,s7,s6]
;will contain the command which was last sent for the setting of channel C. The
;12-bit sample value is extracted from this word and stored in the location for
;channel A. This should mean that channel A is one sample behind channel C. In this
;version that does not mean a lag of 90 degrees because each output is updated
;sequentially and that takes approximatly 14.5us per channel.
;
;This will also demonstrate that the reference voltage on channels A and B is 3.3v
;compared with 2.5v on channels C and D. So whilst the square wave on channel C is
;set for 0.50v to 2.00v, it should be 0.66v to 2.64v on channel A.
;
SR0 s7 ; shift 12-bit value right 4 places
SRA s6
SR0 s7
SRA s6
SR0 s7
SRA s6
SR0 s7
SRA s6
STORE s7, chan_A_msb ;store value for D/A output
STORE s6, chan_A_lsb
;
;
;
;
;Channel B is a triangle waveform of 200Hz.
;
;Given the sample rate of 8KHz, there are 40 samples per waveform period.
;To achieve close to full scale deflection, the waveform needs to increase or
;decrease by 204 each sample so that over the first 20 samples it rises from
;0 to 4080 and then over the next 20 samples it reduces back to zero.
;
FETCH s0, chan_B_lsb ;load current value into [s1,s0]
FETCH s1, chan_B_msb
FETCH s2, triangle_up_down ;read current slope direction
COMPARE s2, 00 ;determine current direction
JUMP NZ, slope_down
ADD s0, CC ;add 204 (00CC hex) to current value
ADDCY s1, 00
COMPARE s1, 0F ;test for peak value of 4080 (0FF0 hex)
JUMP NZ, store_channel_B
COMPARE s0, F0
JUMP NZ, store_channel_B
LOAD s2, 01 ;change to slope down next time
STORE s2, triangle_up_down
JUMP store_channel_B
slope_down: SUB s0, CC ;subtract 204 (00CC hex) from current value
SUBCY s1, 00
COMPARE s1, 00 ;test for zero (0000 hex)
JUMP NZ, store_channel_B
COMPARE s0, 00
JUMP NZ, store_channel_B
LOAD s2, 00 ;change to slope up next time
STORE s2, triangle_up_down
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