Release 8.1.03i par I.27Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.XCOJEFFW30::  Tue Aug 08 15:52:22 2006par -w loopback.ncd loopback.pcf Constraints file: loopback.pcf.Loading device for application Rf_Device from file '2vp30.nph' in environment c:\Xilinx\ISE81.   "loopback" is an NCD, version 3.1, device xc2vp30, package ff896, speed -7Initializing temperature to 85.000 Celsius. (default - Range: -40.000 to 100.000 Celsius)Initializing voltage to 1.400 Volts. (default - Range: 1.400 to 1.600 Volts)Device speed data version:  "PRODUCTION 1.92 2005-11-04".Device Utilization Summary:   Number of BUFGMUXs                  2 out of 16     12%   Number of DCMs                      1 out of 8      12%   Number of External IOBs            21 out of 556     3%      Number of LOCed IOBs            12 out of 21     57%   Number of RAMB16s                   1 out of 136     1%   Number of SLICEs                  153 out of 13696   1%Overall effort level (-ol):   Standard Placer effort level (-pl):    High Placer cost table entry (-t): 1Router effort level (-rl):    Standard Starting initial Timing Analysis.  REAL time: 4 secs Finished initial Timing Analysis.  REAL time: 4 secs Starting PlacerPhase 1.1Phase 1.1 (Checksum:989db7) REAL time: 4 secs Phase 2.31Phase 2.31 (Checksum:1312cfe) REAL time: 4 secs Phase 3.2.Phase 3.2 (Checksum:1c9c37d) REAL time: 9 secs Phase 4.30Phase 4.30 (Checksum:26259fc) REAL time: 9 secs Phase 5.3Phase 5.3 (Checksum:2faf07b) REAL time: 9 secs Phase 6.5Phase 6.5 (Checksum:39386fa) REAL time: 9 secs Phase 7.8...............................................................................................................................................................................................................................................................................................Phase 7.8 (Checksum:9ca49a) REAL time: 11 secs Phase 8.5Phase 8.5 (Checksum:4c4b3f8) REAL time: 11 secs Phase 9.18Phase 9.18 (Checksum:55d4a77) REAL time: 12 secs Phase 10.5Phase 10.5 (Checksum:5f5e0f6) REAL time: 12 secs Phase 11.27Phase 11.27 (Checksum:68e7775) REAL time: 12 secs Phase 12.24Phase 12.24 (Checksum:7270df4) REAL time: 12 secs Writing design to file loopback.pcf.ncdTotal REAL time to Placer completion: 13 secs Total CPU time to Placer completion: 13 secs Starting RouterPhase 1: 1712 unrouted;       REAL time: 24 secs Phase 2: 1496 unrouted;       REAL time: 25 secs Phase 3: 282 unrouted;       REAL time: 25 secs Phase 4: 282 unrouted; (0)      REAL time: 25 secs Phase 5: 282 unrouted; (0)      REAL time: 25 secs Phase 6: 282 unrouted; (0)      REAL time: 25 secs Phase 7: 0 unrouted; (0)      REAL time: 25 secs Phase 8: 0 unrouted; (0)      REAL time: 26 secs Total REAL time to Router completion: 26 secs Total CPU time to Router completion: 26 secs Generating "PAR" statistics.**************************Generating Clock Report**************************+---------------------+--------------+------+------+------------+-------------+|        Clock Net    |   Resource   |Locked|Fanout|Net Skew(ns)|Max Delay(ns)|+---------------------+--------------+------+------+------------+-------------+|            clk50MHz |     BUFGMUX0P| No   |  123 |  0.046     |  1.251      |+---------------------+--------------+------+------+------------+-------------+* Net Skew is the difference between the minimum and maximum routingonly delays for the net. Note this is different from Clock Skew whichis reported in TRCE timing report. Clock Skew is the difference betweenthe minimum and maximum path delays which includes logic delays.   The Delay Summary ReportThe NUMBER OF SIGNALS NOT COMPLETELY ROUTED for this design is: 0   The AVERAGE CONNECTION DELAY for this design is:        0.634   The MAXIMUM PIN DELAY IS:                               2.192   The AVERAGE CONNECTION DELAY on the 10 WORST NETS is:   1.717   Listing Pin Delays by value: (nsec)    d < 1.00   < d < 2.00  < d < 3.00  < d < 4.00  < d < 5.00  d >= 5.00   ---------   ---------   ---------   ---------   ---------   ---------        1461         347           2           0           0           0Timing Score: 0Number of Timing Constraints that were not applied: 1Asterisk (*) preceding a constraint indicates it was not met.   This may be due to a setup or hold violation.------------------------------------------------------------------------------------------------------  Constraint                                | Requested  | Actual     | Logic  | Absolute   |Number of                                              |            |            | Levels | Slack      |errors     ------------------------------------------------------------------------------------------------------  OFFSET = IN 6 ns BEFORE COMP "clk"        | 6.000ns    | 4.291ns    | 1      | 1.709ns    | 0         ------------------------------------------------------------------------------------------------------  OFFSET = OUT 7.5 ns AFTER COMP "clk"      | 7.500ns    | 4.278ns    | 1      | 3.222ns    | 0         ------------------------------------------------------------------------------------------------------  TS_Inst_my_dcm_CLKFX_BUF = PERIOD TIMEGRP | 40.000ns   | 6.330ns    | 5      | 33.670ns   | 0            "Inst_my_dcm_CLKFX_BUF" TS_clk / 0.5     |            |            |        |            |                  HIGH 50%                             |            |            |        |            |           ------------------------------------------------------------------------------------------------------  TS_clk = PERIOD TIMEGRP "clk" 20 ns HIGH  | N/A        | N/A        | N/A    | N/A        | N/A         50%                                       |            |            |        |            |           ------------------------------------------------------------------------------------------------------All constraints were met.INFO:Timing:2761 - N/A entries in the Constraints list may indicate that the   constraint does not cover any paths or that it has no requested value.Generating Pad Report.All signals are completely routed.Total REAL time to PAR completion: 29 secs Total CPU time to PAR completion: 28 secs Peak Memory Usage:  224 MBPlacement: Completed - No errors found.Routing: Completed - No errors found.Timing: Completed - No errors found.Number of error messages: 0Number of warning messages: 0Number of info messages: 0Writing design to file loopback.pcf.ncdPAR done!