# Copyright (C) 1991-2004 Altera Corporation
# Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
# support information,  device programming or simulation file,  and any other
# associated  documentation or information  provided by  Altera  or a partner
# under  Altera's   Megafunction   Partnership   Program  may  be  used  only
# to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
# other  use  of such  megafunction  design,  netlist,  support  information,
# device programming or simulation file,  or any other  related documentation
# or information  is prohibited  for  any  other purpose,  including, but not
# limited to  modification,  reverse engineering,  de-compiling, or use  with
# any other  silicon devices,  unless such use is  explicitly  licensed under
# a separate agreement with  Altera  or a megafunction partner.  Title to the
# intellectual property,  including patents,  copyrights,  trademarks,  trade
# secrets,  or maskworks,  embodied in any such megafunction design, netlist,
# support  information,  device programming or simulation file,  or any other
# related documentation or information provided by  Altera  or a megafunction
# partner, remains with Altera, the megafunction partner, or their respective
# licensors. No other licenses, including any licenses needed under any third
# party's intellectual property, are provided herein.


# The default values for assignments are stored in the file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "10:18:26  MAY 10, 2006"
set_global_assignment -name LAST_QUARTUS_VERSION 4.0
set_global_assignment -name BDF_FILE Pc104_Cpld.bdf
set_global_assignment -name SOURCE_FILE AddressDecoder.vhd
set_global_assignment -name SOURCE_FILE RegAndIntMode.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE Pc104_Cpld.vwf
set_global_assignment -name SOURCE_FILE StartAdMode.vhd
set_global_assignment -name SOURCE_FILE AdToFifo.vhd

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_1 -to RD_Fifo
set_location_assignment PIN_2 -to ReadAd\[1\]
set_location_assignment PIN_6 -to ChannelVector\[0\]
set_location_assignment PIN_7 -to ChannelVector\[1\]
set_location_assignment PIN_8 -to ChannelVector\[2\]
set_location_assignment PIN_9 -to ChannelVector\[3\]
set_location_assignment PIN_10 -to ReadAd\[2\]
set_location_assignment PIN_13 -to OUT_ST
set_location_assignment PIN_14 -to ReadAd\[3\]
set_location_assignment PIN_17 -to CS_8254
set_location_assignment PIN_20 -to "IOCS16-1"
set_location_assignment PIN_21 -to "IOCS16-2"
set_location_assignment PIN_22 -to "IOCS16-3"
set_location_assignment PIN_23 -to "IOCS16-4"
set_location_assignment PIN_24 -to RESET
set_location_assignment PIN_25 -to CS_D
set_location_assignment PIN_27 -to DataBus\[7\]
set_location_assignment PIN_28 -to DataBus\[6\]
set_location_assignment PIN_29 -to DataBus\[5\]
set_location_assignment PIN_30 -to DataBus\[4\]
set_location_assignment PIN_31 -to DataBus\[3\]
set_location_assignment PIN_32 -to DataBus\[2\]
set_location_assignment PIN_33 -to DataBus\[1\]
set_location_assignment PIN_35 -to DataBus\[0\]
set_location_assignment PIN_36 -to SBHE
set_location_assignment PIN_37 -to AEN
set_location_assignment PIN_40 -to IOW
set_location_assignment PIN_41 -to IOR
set_location_assignment PIN_42 -to SA\[9\]
set_location_assignment PIN_44 -to SA\[8\]
set_location_assignment PIN_45 -to SA\[7\]
set_location_assignment PIN_46 -to SA\[6\]
set_location_assignment PIN_47 -to SA\[5\]
set_location_assignment PIN_48 -to SA\[4\]
set_location_assignment PIN_49 -to SA\[3\]
set_location_assignment PIN_50 -to SA\[2\]
set_location_assignment PIN_52 -to SA\[1\]
set_location_assignment PIN_53 -to SA\[0\]
set_location_assignment PIN_83 -to CpldState
set_location_assignment PIN_100 -to HF
set_location_assignment PIN_99 -to EF
set_location_assignment PIN_97 -to FF
set_location_assignment PIN_96 -to WriteFifo
set_location_assignment PIN_93 -to Convst
set_location_assignment PIN_92 -to ReadAd\[0\]
set_location_assignment PIN_87 -to Clk
set_location_assignment PIN_98 -to nReset
set_location_assignment PIN_5 -to Int\[1\]
set_location_assignment PIN_12 -to Int\[2\]
set_location_assignment PIN_16 -to Int\[3\]
set_location_assignment PIN_94 -to Int\[0\]

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY MAX7000S
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 7
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 100
set_global_assignment -name DEVICE_FILTER_PACKAGE TQFP
set_global_assignment -name TOP_LEVEL_ENTITY Pc104_Cpld

# Fitter Assignments
# ==================
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name DEVICE "EPM7128STC100-7"
set_global_assignment -name MAX7000_DEVICE_IO_STANDARD LVTTL