?? bit_synchronous.rpt
字號:
| +----------------------- LC28 |LPM_ADD_SUB:636|addcore:adder|addcore:adder0|result_node3
| | +--------------------- LC24 |LPM_ADD_SUB:636|addcore:adder|addcore:adder0|result_node4
| | | +------------------- LC23 |LPM_ADD_SUB:636|addcore:adder|addcore:adder0|result_node5
| | | | +----------------- LC22 |LPM_ADD_SUB:636|addcore:adder|addcore:adder0|result_node6
| | | | | +--------------- LC21 count18759
| | | | | | +------------- LC20 count18758
| | | | | | | +----------- LC18 count18754
| | | | | | | | +--------- LC17 count18753
| | | | | | | | | +------- LC25 preset187510
| | | | | | | | | | +----- LC26 preset18759
| | | | | | | | | | | +--- LC19 preset18758
| | | | | | | | | | | | +- LC27 preset18756
| | | | | | | | | | | | |
| | | | | | | | | | | | | Other LABs fed by signals
| | | | | | | | | | | | | that feed LAB 'B'
LC | | | | | | | | | | | | | | A B C D | Logic cells that feed LAB 'B':
LC28 -> - - - - - - - - * - - - - | - * - - | <-- |LPM_ADD_SUB:636|addcore:adder|addcore:adder0|result_node3
LC24 -> - - - - - - - * - - - - - | - * - - | <-- |LPM_ADD_SUB:636|addcore:adder|addcore:adder0|result_node4
LC21 -> - - - - - * * * * - - - - | - * * - | <-- count18759
LC20 -> - - - - - * * * * - - - - | - * * - | <-- count18758
LC18 -> - - * * * * * * * - - - - | - * * - | <-- count18754
LC17 -> - * * * * * * * * - - - - | - * * - | <-- count18753
LC26 -> - - - - - * - - - - - - - | - * - - | <-- preset18759
LC19 -> - - - - - - * - - - - - - | - * - - | <-- preset18758
Pin
LC43 -> - - - - - - * - - - - - - | - * - - | <-- |LPM_ADD_SUB:636|addcore:adder|addcore:adder1|result_node0
LC45 -> - - - - - * - - - - - - - | - * - - | <-- |LPM_ADD_SUB:636|addcore:adder|addcore:adder1|result_node1
LC57 -> - - - - - * * * * - - - - | - * * - | <-- clk_480KHz
LC49 -> - - - - - - - - - * * * * | - * * - | <-- bit_pulse
LC37 -> - - - - - * * * * - - - - | - * * - | <-- count187510
LC36 -> - - - - - * * * * - - - - | - * * - | <-- count18757
LC34 -> - - - - * * * * * - - - - | - * * - | <-- count18756
LC47 -> - - - * * * * * * - - - - | - * * - | <-- count18755
LC38 -> * * * * * * * * * - - - - | - * * - | <-- count18752
LC40 -> * * * * * * * * * - - - - | - * * - | <-- count18751
LC41 -> * * * * * * * * * - - - - | - * * - | <-- count18750
LC42 -> - - - - - - - * - - - - - | - * - - | <-- preset18754
LC44 -> - - - - - - - - * - - - - | - * - - | <-- preset18753
* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).
Device-Specific Information:d:\so2006\cpld-pro\quartus6\pll1218\bit_synchronous.rpt
bit_synchronous
** LOGIC CELL INTERCONNECTIONS **
Logic Array Block 'C':
Logic cells placed in LAB 'C'
+------------------------------- LC33 bit_sync
| +----------------------------- LC39 |LPM_ADD_SUB:636|addcore:adder|addcore:adder0|result_node7
| | +--------------------------- LC43 |LPM_ADD_SUB:636|addcore:adder|addcore:adder1|result_node0
| | | +------------------------- LC45 |LPM_ADD_SUB:636|addcore:adder|addcore:adder1|result_node1
| | | | +----------------------- LC46 |LPM_ADD_SUB:636|addcore:adder|addcore:adder1|result_node2
| | | | | +--------------------- LC37 count187510
| | | | | | +------------------- LC36 count18757
| | | | | | | +----------------- LC34 count18756
| | | | | | | | +--------------- LC47 count18755
| | | | | | | | | +------------- LC38 count18752
| | | | | | | | | | +----------- LC40 count18751
| | | | | | | | | | | +--------- LC41 count18750
| | | | | | | | | | | | +------- LC42 preset18754
| | | | | | | | | | | | | +----- LC44 preset18753
| | | | | | | | | | | | | | +--- LC48 preset18751
| | | | | | | | | | | | | | | +- LC35 preset18750
| | | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | | Other LABs fed by signals
| | | | | | | | | | | | | | | | that feed LAB 'C'
LC | | | | | | | | | | | | | | | | | A B C D | Logic cells that feed LAB 'C':
LC39 -> - - - - - - * - - - - - - - - - | - - * - | <-- |LPM_ADD_SUB:636|addcore:adder|addcore:adder0|result_node7
LC46 -> - - - - - * - - - - - - - - - - | - - * - | <-- |LPM_ADD_SUB:636|addcore:adder|addcore:adder1|result_node2
LC37 -> * - - - * * * * * * * * * * * * | - * * - | <-- count187510
LC36 -> * * * * * * * * * * * * * * * * | - * * - | <-- count18757
LC34 -> * * * * * * * * * * * * * * * * | - * * - | <-- count18756
LC47 -> * * * * * * * * * * * * * * * * | - * * - | <-- count18755
LC38 -> * * * * * * * * * * * * * * * * | - * * - | <-- count18752
LC40 -> * * * * * * * * * * * * * * * * | - * * - | <-- count18751
LC41 -> * * * * * * * * * * * * * * * * | - * * - | <-- count18750
LC48 -> - - - - - - - - - - * - - - - - | - - * - | <-- preset18751
LC35 -> - - - - - - - - - - - * - - - - | - - * - | <-- preset18750
Pin
11 -> - - - - - - - - - - - - * * - - | - - * - | <-- fast
LC29 -> - - - - - - - - - * - - - - - - | - - * - | <-- |LPM_ADD_SUB:636|addcore:adder|addcore:adder0|result_node2
LC23 -> - - - - - - - - * - - - - - - - | - - * - | <-- |LPM_ADD_SUB:636|addcore:adder|addcore:adder0|result_node5
LC22 -> - - - - - - - * - - - - - - - - | - - * - | <-- |LPM_ADD_SUB:636|addcore:adder|addcore:adder0|result_node6
LC57 -> * - - - - * * * * * * * - - - - | - * * - | <-- clk_480KHz
LC49 -> - - - - - - - - - - - - * * * * | - * * - | <-- bit_pulse
LC21 -> * - - * * * * * * * * * * * * * | - * * - | <-- count18759
LC20 -> * - * * * * * * * * * * * * * * | - * * - | <-- count18758
LC18 -> * * * * * * * * * * * * * * * * | - * * - | <-- count18754
LC17 -> * * * * * * * * * * * * * * * * | - * * - | <-- count18753
LC25 -> - - - - - * - - - - - - - - - - | - - * - | <-- preset187510
LC27 -> - - - - - - - * - - - - - - - - | - - * - | <-- preset18756
* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).
Device-Specific Information:d:\so2006\cpld-pro\quartus6\pll1218\bit_synchronous.rpt
bit_synchronous
** LOGIC CELL INTERCONNECTIONS **
Logic Array Block 'D':
Logic cells placed in LAB 'D'
+----------------------------- LC51 code256
| +--------------------------- LC54 |LPM_ADD_SUB:315|addcore:adder|addcore:adder0|result_node3
| | +------------------------- LC53 |LPM_ADD_SUB:315|addcore:adder|addcore:adder0|result_node4
| | | +----------------------- LC63 m2
| | | | +--------------------- LC60 m1
| | | | | +------------------- LC56 m0
| | | | | | +----------------- LC55 fangbo
| | | | | | | +--------------- LC52 count254
| | | | | | | | +------------- LC62 count253
| | | | | | | | | +----------- LC61 count252
| | | | | | | | | | +--------- LC59 count251
| | | | | | | | | | | +------- LC58 count250
| | | | | | | | | | | | +----- LC57 clk_480KHz
| | | | | | | | | | | | | +--- LC50 q
| | | | | | | | | | | | | | +- LC49 bit_pulse
| | | | | | | | | | | | | | |
| | | | | | | | | | | | | | | Other LABs fed by signals
| | | | | | | | | | | | | | | that feed LAB 'D'
LC | | | | | | | | | | | | | | | | A B C D | Logic cells that feed LAB 'D':
LC54 -> - - - - - - - - * - - - - - - | - - - * | <-- |LPM_ADD_SUB:315|addcore:adder|addcore:adder0|result_node3
LC53 -> - - - - - - - * - - - - - - - | - - - * | <-- |LPM_ADD_SUB:315|addcore:adder|addcore:adder0|result_node4
LC63 -> - - - * * - - - - - - - - - - | - - - * | <-- m2
LC60 -> - - - * - * - - - - - - - - - | - - - * | <-- m1
LC56 -> * - - * - - - - - - - - - * * | - - - * | <-- m0
LC55 -> * - - - - - * - - - - - - * * | - - - * | <-- fangbo
LC52 -> - - * - - - - * * - - * * - - | - - - * | <-- count254
LC62 -> - * * - - - - * * - - * * - - | - - - * | <-- count253
LC61 -> - * * - - - - * * * - * * - - | - - - * | <-- count252
LC59 -> - * * - - - - * * * * * * - - | - - - * | <-- count251
LC58 -> - * * - - - - * * * * * * - - | - - - * | <-- count250
LC50 -> - - - - - - - - - - - - - - * | - - - * | <-- q
Pin
6 -> - - - - - - - * * * * * * * * | - - - * | <-- clock
8 -> * - - - - - - - - - - - - * * | - - - * | <-- code_sel
9 -> - - - * * * * * * * * * * * * | - - - * | <-- en_clock
12 -> - - - * * * * - - - - - - - - | - - - * | <-- fb
* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).
Device-Specific Information:d:\so2006\cpld-pro\quartus6\pll1218\bit_synchronous.rpt
bit_synchronous
** EQUATIONS **
clock : INPUT;
code_sel : INPUT;
en_clock : INPUT;
fast : INPUT;
fb : INPUT;
-- Node name is ':25' = 'bit_pulse'
-- Equation name is 'bit_pulse', location is LC049, type is buried.
bit_pulse = DFFE( _EQ001 $ GND, _EQ002, VCC, VCC, VCC);
_EQ001 = code_sel & m0 & !q
# code_sel & !m0 & q
# !code_sel & fangbo & !q
# !code_sel & !fangbo & q;
_EQ002 = clock & en_clock;
-- Node name is 'bit_sync' = ':6'
-- Equation name is 'bit_sync', type is output
bit_sync = DFFE( _EQ003 $ _EQ004, clk_480KHz, VCC, VCC, VCC);
_EQ003 = count18750 & count18751 & count18752 & count18753 &
count18754 & count18755 & !count18756 & !count18757 &
!count18758 & !count18759 & !count187510;
_EQ004 = !count18756 & !count18757 & !count18758 & !count18759 &
!count187510;
-- Node name is ':23' = 'clk_480KHz'
-- Equation name is 'clk_480KHz', location is LC057, type is buried.
clk_480KHz = DFFE( _EQ005 $ VCC, _EQ006, VCC, VCC, VCC);
_EQ005 = !count250 & !count251 & !count252 & !count253 & !count254;
_EQ006 = clock & en_clock;
-- Node name is 'code256'
-- Equation name is 'code256', location is LC051, type is output.
code256 = LCELL( _EQ007 $ GND);
_EQ007 = code_sel & m0
# !code_sel & fangbo;
-- Node name is ':22' = 'count250'
-- Equation name is 'count250', location is LC058, type is buried.
count250 = TFFE(!_EQ008, _EQ009, VCC, VCC, VCC);
_EQ008 = !count250 & !count251 & !count252 & count253 & count254;
_EQ009 = clock & en_clock;
-- Node name is ':21' = 'count251'
-- Equation name is 'count251', location is LC059, type is buried.
count251 = TFFE( count250, _EQ010, VCC, VCC, VCC);
_EQ010 = clock & en_clock;
-- Node name is ':20' = 'count252'
-- Equation name is 'count252', location is LC061, type is buried.
count252 = TFFE( _EQ011, _EQ012, VCC, VCC, VCC);
_EQ011 = count250 & count251;
_EQ012 = clock & en_clock;
-- Node name is ':19' = 'count253'
-- Equation name is 'count253', location is LC062, type is buried.
count253 = DFFE( _EQ013 $ _LC054, _EQ014, VCC, VCC, VCC);
_EQ013 = !count250 & !count251 & !count252 & count253 & count254 &
_LC054;
_EQ014 = clock & en_clock;
-- Node name is ':18' = 'count254'
-- Equation name is 'count254', location is LC052, type is buried.
count254 = DFFE( _EQ015 $ _LC053, _EQ016, VCC, VCC, VCC);
_EQ015 = !count250 & !count251 & !count252 & count253 & count254 &
_LC053;
_EQ016 = clock & en_clock;
-- Node name is ':36' = 'count18750'
-- Equation name is 'count18750', location is LC041, type is buried.
count18750 = TFFE(!_EQ017, clk_480KHz, VCC, VCC, VCC);
_EQ017 = !count18750 & !count18751 & !count18752 & !count18753 &
!count18754 & !count18755 & !count18756 & !count18757 &
!count18758 & !count18759 & !count187510 & !preset18750;
-- Node name is ':35' = 'count18751'
-- Equation name is 'count18751', location is LC040, type is buried.
count18751 = TFFE(!_EQ018, clk_480KHz, VCC, VCC, VCC);
_EQ018 = !count18750 & !count18751 & !count18752 & !count18753 &
!count18754 & !count18755 & !count18756 & !count18757 &
!count18758 & !count18759 & !count187510 & !preset18751
# count18750;
-- Node name is ':34' = 'count18752'
-- Equation name is 'count18752', location is LC038, type is buried.
count18752 = DFFE( _EQ019 $ _LC029, clk_480KHz, VCC, VCC, VCC);
_EQ019 = !count18750 & !count18751 & !count18752 & !count18753 &
!count18754 & !count18755 & !count18756 & !count18757 &
!count18758 & !count18759 & !count187510 & _LC029;
-- Node name is ':33' = 'count18753'
-- Equation name is 'count18753', location is LC017, type is buried.
count18753 = DFFE( _EQ020 $ _LC028, clk_480KHz, VCC, VCC, VCC);
_EQ020 = !count18750 & !count18751 & !count18752 & !count18753 &
!count18754 & !count18755 & !count18756 & !count18757 &
!count18758 & !count18759 & !count187510 & !_LC028 &
preset18753
# !count18750 & !count18751 & !count18752 & !count18753 &
!count18754 & !count18755 & !count18756 & !count18757 &
!count18758 & !count18759 & !count187510 & _LC028 &
!preset18753;
-- Node name is ':32' = 'count18754'
-- Equation name is 'count18754', location is LC018, type is buried.
count18754 = DFFE( _EQ021 $ _LC024, clk_480KHz, VCC, VCC, VCC);
_EQ021 = !count18750 & !count18751 & !count18752 & !count18753 &
!count18754 & !count18755 & !count18756 & !count18757 &
!count18758 & !count18759 & !count187510 & !_LC024 &
preset18754
# !count18750 & !count18751 & !count18752 & !count18753 &
!count18754 & !count18755 & !count18756 & !count18757 &
!count18758 & !count18759 & !count187510 & _LC024 &
!preset18754;
-- Node name is ':31' = 'count18755'
-- Equation name is 'count18755', location is LC047, type is buried.
count18755 = DFFE( _EQ022 $ _LC023, clk_480KHz, VCC, VCC, VCC);
_EQ022 = !count18750 & !count18751 & !count18752 & !count18753 &
!count18754 & !count18755 & !count18756 & !count18757 &
!count18758 & !count18759 & !count187510 & _LC023;
-- Node name is ':30' = 'count18756'
-- Equation name is 'count18756', location is LC034, type is buried.
count18756 = DFFE( _EQ023 $ _LC022, clk_480KHz, VCC, VCC, VCC);
_EQ023 = !count18750 & !count18751 & !count18752 & !count18753 &
!count18754 & !count18755 & !count18756 & !count18757 &
!count18758 & !count18759 & !count187510 & !_LC022 &
preset18756
# !count18750 & !count18751 & !count18752 & !count18753 &
!count18754 & !count18755 & !count18756 & !count18757 &
!count18758 & !count18759 & !count187510 & _LC022 &
!preset18756;
-- Node name is ':29' = 'count18757'
-- Equation name is 'count18757', location is LC036, type is buried.
count18757 = DFFE( _EQ024 $ _LC039, clk_480KHz, VCC, VCC, VCC);
_EQ024 = !count18750 & !count18751 & !count18752 & !count18753 &
?? 快捷鍵說明
復制代碼
Ctrl + C
搜索代碼
Ctrl + F
全屏模式
F11
切換主題
Ctrl + Shift + D
顯示快捷鍵
?
增大字號
Ctrl + =
減小字號
Ctrl + -