--   --           _/_/_/_/_/_/_/_/_/_/_/_/_/_/_/_/--         _/                   _/  ____________________________________________ --         _/                  _/  /                                           / --         _/_/               _/  /                                NAND01GR3B / --          _/_/_/           _/  /                                           /  --             _/_/         _/  /                                     1Gbit / --              _/_/       _/  /        8 bit, 2112 Byte Page, 1.8 V, NAND / --                _/      _/  /                                           / --                _/     _/  /                     VHDL Behavioral Model / --                _/    _/  /                               Version 3.0 / --             _/_/    _/  /                                           /--          _/_/_/    _/  /     Copyright (c) 2006 STMicroelectronics / --        _/_/_/     _/  /___________________________________________/ --  _/_/_/_/_/      _/    --  --LIBRARY IEEE;    Use IEEE.std_logic_1164.all;    Use IEEE.std_logic_unsigned.all;LIBRARY Work;    use work.UserData.all;package data is------------------------------------------------ DEFINITION OF AVAILABLE DEVICES--------------------------------------------- type Size is (s_512M, s_1G, s_2G, s_4G, s_8G);type bus_type is (bus8, bus16);type version is (F90_R, F90_W, F70_R, F70_W, F70_2R, F70_2W); -- F70_R, F70_W   : no PRL-- F70_2R, F70_2W : with PRLtype Device is record        Size_dev                : Size;        bus_dev                 : bus_type;        Vddmin_dev              : real;        Vddmax_dev              : real;        TimeIndex_dev           : version;        DeviceCode_dev          : bit_vector(15 downto 0);        AddressWidth_dev        : natural;end record; -- voltage supply Constant VddMin_W       : real    :=      2.7;Constant VddMax_W       : real    :=      3.6;Constant VddMin_R       : real    :=      1.7;Constant VddMax_R       : real    :=      1.95;Constant TimeIndex_R    : Natural :=  0;              Constant TimeIndex_W    : Natural :=  1;                                   ------------------------------------- 01G devices   -----------------------------------------------------Constant NAND01GR3B_dev : Device := (                                    Size_dev            =>      s_1G,                                    bus_dev             =>      bus8,                                                                        Vddmin_dev          =>      VddMin_R,                                    Vddmax_dev          =>      VddMax_R,                                    TimeIndex_dev       =>      F90_R,                                                                                    DeviceCode_dev      =>      x"00A1",                                                                                     AddressWidth_dev    =>      28     );Constant NAND01GW3B_dev : Device := (                                    Size_dev            =>      s_1G,                                    bus_dev             =>      bus8,                                    Vddmin_dev          =>      VddMin_W,                                    Vddmax_dev          =>      VddMax_W,                                    TimeIndex_dev       =>      F90_W,                                                                                    DeviceCode_dev      =>      x"00F1",                                                                                     AddressWidth_dev    =>      28     );Constant NAND01GR4B2A_dev : Device := (                                    Size_dev            =>      s_1G,                                    bus_dev             =>      bus16,                                                                        Vddmin_dev          =>      VddMin_R,                                    Vddmax_dev          =>      VddMax_R,                                    TimeIndex_dev       =>      F90_R,                                                                                    DeviceCode_dev      =>      x"00B1",                                                                                     AddressWidth_dev    =>      27     );------------------------------------- 04G devices   -----------------------------------------------------Constant NAND04GW3B2B_dev : Device := (                                    Size_dev            =>      s_4G,                                    bus_dev             =>      bus8,                                    Vddmin_dev          =>      VddMin_W,                                    Vddmax_dev          =>      VddMax_W,                                    TimeIndex_dev       =>      F70_2W,                                                                                    DeviceCode_dev      =>      x"00DC",                                                                                     AddressWidth_dev    =>      30     );type allDevices_type is array (DeviceName) of Device;Constant allDevices : allDevices_type := ( NAND01GR3B_dev, NAND01GW3B_dev, NAND01GR4B2A_dev,                                            NAND04GW3B2B_dev );Constant CD : Device := allDevices(CurrentDevice);------------------------------------------------ COSTANTI E TIPI DI BASE----------------------------------------------  -- generic definition for all VHDL model  Constant HIGH     : Integer := 1;  Constant LOW      : Integer := 0;  Constant UNLOCKED : Std_Logic := '0';  Constant LOCKED   : Std_Logic := '1';  Constant BUSY     : Std_Logic := '0';  Constant READY    : Std_Logic := '1';  subtype  NIBBLE_range is Integer range 3 downto 0;  Subtype  BYTE_range is Integer range 7 downto 0;  Subtype  WORD_range is Integer range 15 downto 0;  Subtype  HIGH_range is Integer range 15 downto 8;  Subtype  LOW_range  is Integer range 7 downto 0;  Constant BYTENP   : Integer := 16#FF#;    -- Bus Width and relating types  type IOBusWidth_dev_type is array(bus_type) of natural;  constant IOBusWidth_dev : IOBusWidth_dev_type := (8, 16) ;  Constant IOBusWidth : Natural := IOBusWidth_dev(CD.bus_dev);  Subtype  IObus_range      is Integer range IObusWidth - 1  downto 0;  Subtype  IObus_range_ext  is Integer range 15  downto 0;  Subtype  IObus_type       is  Std_Logic_vector(IObus_range);  Subtype  IObus_type_ext   is  Std_Logic_vector(IObus_range_ext);      -- address dim and ranges  Constant Address_Dim      : natural := CD.AddressWidth_dev; -- address dimension   Subtype  Address_range    is Natural range Address_Dim - 1  downto 0;  Subtype  Address_type     is  Std_Logic_Vector(Address_range);  -- massima lunghezza dell'address al variare del taglio del dispositivo   constant AddressWidthMax_max    : natural   := 31;  Subtype  TotAddress_type  is std_logic_vector(AddressWidthMax_max - 1 downto 0);    -- status register  subtype  DataReg_type  is bit_vector(BYTE_range);   -- declarations for memory storage  Constant DataMem_dim  : natural := IOBusWidth;  Constant AddrMem_dim  : natural := CD.AddressWidth_dev;    subtype  DataMem_range is Natural range DataMem_dim - 1 downto 0;  Constant Memory_Dim   : natural := 2**CD.AddressWidth_dev;     -- memory dimension  Constant Last_Addr    : natural := Memory_Dim -1;  Subtype  DataMem_type is bit_vector(DataMem_range);  Subtype  AddrMem_type is Natural range 0 to Memory_Dim - 1;  -- sub-address bounds definition  type address_indexBound_type is array(bus_type) of natural;  Constant ColumnAddressSup_dev : address_indexBound_type := (11, 10);  Constant PageAddressInf_dev   : address_indexBound_type := (12, 11);  Constant PageAddressSup_dev   : address_indexBound_type := (17, 16);  Constant BlockAddressInf_dev  : address_indexBound_type := (18, 17);  Constant ColumnAddressSup : natural := ColumnAddressSup_dev(CD.bus_dev);  Constant PageAddressInf   : natural := PageAddressInf_dev(CD.bus_dev);  Constant PageAddressSup   : natural := PageAddressSup_dev(CD.bus_dev);    Constant BlockAddressInf  : natural := BlockAddressInf_dev(CD.bus_dev);  Constant BlockAddressSup  : natural := CD.AddressWidth_dev - 1;    -- sub-Address ranges  Subtype ColumnAddress_range  is Integer range ColumnAddressSup downto  0;  Subtype PageAddress_range    is Integer range PageAddressSup downto PageAddressInf;  Subtype BlockAddress_range   is Integer range BlockAddressSup  downto BlockAddressInf;  Subtype BlockAddress_normRange   is Integer range BlockAddressSup-BlockAddressInf  downto 0;