?? dvide9851.vhd
字號(hào):
-- megafunction wizard: %LPM_DIVIDE%
-- GENERATION: STANDARD
-- VERSION: WM1.0
-- MODULE: lpm_divide
-- ============================================================
-- File Name: Dvide9851.vhd
-- Megafunction Name(s):
-- lpm_divide
-- ============================================================
-- ************************************************************
-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
--
-- 5.1 Build 176 10/26/2005 SJ Full Version
-- ************************************************************
--Copyright (C) 1991-2005 Altera Corporation
--Your use of Altera Corporation's design tools, logic functions
--and other software and tools, and its AMPP partner logic
--functions, and any output files any of the foregoing
--(including device programming or simulation files), and any
--associated documentation or information are expressly subject
--to the terms and conditions of the Altera Program License
--Subscription Agreement, Altera MegaCore Function License
--Agreement, or other applicable license agreement, including,
--without limitation, that your use is for the sole purpose of
--programming logic devices manufactured by Altera and sold by
--Altera or its authorized distributors. Please refer to the
--applicable agreement for further details.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
LIBRARY lpm;
USE lpm.lpm_components.all;
ENTITY Dvide9851 IS
PORT
(
denom : IN STD_LOGIC_VECTOR (28 DOWNTO 0);
numer : IN STD_LOGIC_VECTOR (55 DOWNTO 0);
quotient : OUT STD_LOGIC_VECTOR (55 DOWNTO 0);
remain : OUT STD_LOGIC_VECTOR (28 DOWNTO 0)
);
END Dvide9851;
ARCHITECTURE SYN OF dvide9851 IS
SIGNAL sub_wire0 : STD_LOGIC_VECTOR (55 DOWNTO 0);
SIGNAL sub_wire1 : STD_LOGIC_VECTOR (28 DOWNTO 0);
COMPONENT lpm_divide
GENERIC (
lpm_drepresentation : STRING;
lpm_hint : STRING;
lpm_nrepresentation : STRING;
lpm_type : STRING;
lpm_widthd : NATURAL;
lpm_widthn : NATURAL
);
PORT (
denom : IN STD_LOGIC_VECTOR (28 DOWNTO 0);
quotient : OUT STD_LOGIC_VECTOR (55 DOWNTO 0);
remain : OUT STD_LOGIC_VECTOR (28 DOWNTO 0);
numer : IN STD_LOGIC_VECTOR (55 DOWNTO 0)
);
END COMPONENT;
BEGIN
quotient <= sub_wire0(55 DOWNTO 0);
remain <= sub_wire1(28 DOWNTO 0);
lpm_divide_component : lpm_divide
GENERIC MAP (
lpm_drepresentation => "UNSIGNED",
lpm_hint => "LPM_REMAINDERPOSITIVE=TRUE",
lpm_nrepresentation => "UNSIGNED",
lpm_type => "LPM_DIVIDE",
lpm_widthd => 29,
lpm_widthn => 56
)
PORT MAP (
denom => denom,
numer => numer,
quotient => sub_wire0,
remain => sub_wire1
);
END SYN;
-- ============================================================
-- CNX file retrieval info
-- ============================================================
-- Retrieval info: PRIVATE: PRIVATE_LPM_REMAINDERPOSITIVE STRING "TRUE"
-- Retrieval info: PRIVATE: PRIVATE_MAXIMIZE_SPEED NUMERIC "-1"
-- Retrieval info: PRIVATE: USING_PIPELINE NUMERIC "0"
-- Retrieval info: PRIVATE: VERSION_NUMBER NUMERIC "2"
-- Retrieval info: CONSTANT: LPM_DREPRESENTATION STRING "UNSIGNED"
-- Retrieval info: CONSTANT: LPM_HINT STRING "LPM_REMAINDERPOSITIVE=TRUE"
-- Retrieval info: CONSTANT: LPM_NREPRESENTATION STRING "UNSIGNED"
-- Retrieval info: CONSTANT: LPM_TYPE STRING "LPM_DIVIDE"
-- Retrieval info: CONSTANT: LPM_WIDTHD NUMERIC "29"
-- Retrieval info: CONSTANT: LPM_WIDTHN NUMERIC "56"
-- Retrieval info: USED_PORT: denom 0 0 29 0 INPUT NODEFVAL denom[28..0]
-- Retrieval info: USED_PORT: numer 0 0 56 0 INPUT NODEFVAL numer[55..0]
-- Retrieval info: USED_PORT: quotient 0 0 56 0 OUTPUT NODEFVAL quotient[55..0]
-- Retrieval info: USED_PORT: remain 0 0 29 0 OUTPUT NODEFVAL remain[28..0]
-- Retrieval info: CONNECT: @numer 0 0 56 0 numer 0 0 56 0
-- Retrieval info: CONNECT: @denom 0 0 29 0 denom 0 0 29 0
-- Retrieval info: CONNECT: quotient 0 0 56 0 @quotient 0 0 56 0
-- Retrieval info: CONNECT: remain 0 0 29 0 @remain 0 0 29 0
-- Retrieval info: LIBRARY: lpm lpm.lpm_components.all
-- Retrieval info: GEN_FILE: TYPE_NORMAL Dvide9851.vhd TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL Dvide9851.inc FALSE
-- Retrieval info: GEN_FILE: TYPE_NORMAL Dvide9851.cmp TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL Dvide9851.bsf TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL Dvide9851_inst.vhd FALSE
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