?? xst.xmsgs
字號:
<?xml version="1.0" encoding="UTF-8"?>
<!-- IMPORTANT: This is an internal file that has been generated
by the Xilinx ISE software. Any direct editing or
changes made to this file may result in unpredictable
behavior or data corruption. It is strongly advised that
users do not edit the contents of this file. -->
<messages>
<msg type="warning" file="Xst" num="819" delta="unknown" >"<arg fmt="%s" index="1">F:/FPGA/ps2_lcd_1602/ps2.vhd</arg>" line <arg fmt="%d" index="2">109</arg>: The following signals are missing in the process sensitivity list:
<arg fmt="%s" index="3">parbit</arg>.
</msg>
<msg type="warning" file="Xst" num="819" delta="unknown" >"<arg fmt="%s" index="1">F:/FPGA/ps2_lcd_1602/ps2.vhd</arg>" line <arg fmt="%d" index="2">165</arg>: The following signals are missing in the process sensitivity list:
<arg fmt="%s" index="3">hit_cnt</arg>.
</msg>
<msg type="warning" file="Xst" num="790" delta="unknown" >"<arg fmt="%s" index="1">F:/FPGA/ps2_lcd_1602/LCD1602.vhd</arg>" line <arg fmt="%d" index="2">95</arg>: Index value(s) does not match array range, simulation mismatch.
</msg>
<msg type="warning" file="Xst" num="1780" delta="unknown" >Signal <<arg fmt="%s" index="1">m</arg>> is never used or assigned.
</msg>
<msg type="info" file="Xst" num="1442" delta="unknown" >HDL ADVISOR - The RAM contents appears to be read asynchronously. A synchronous read would allow you to take advantage of available block RAM resources, for optimized device usage and improved timings. Please refer to your documentation for coding guidelines.
</msg>
<msg type="warning" file="Xst" num="737" delta="unknown" >Found <arg fmt="%d" index="1">11</arg>-bit latch for signal <<arg fmt="%s" index="2">hit_cnt</arg>>.
</msg>
<msg type="warning" file="Xst" num="737" delta="unknown" >Found <arg fmt="%d" index="1">1</arg>-bit latch for signal <<arg fmt="%s" index="2">hit_1</arg>>.
</msg>
<msg type="info" file="Xst" num="1767" delta="unknown" >HDL ADVISOR - Resource sharing has identified that some arithmetic operations in this design can share the same physical resources for reduced device utilization. For improved clock frequency you may try to disable resource sharing.
</msg>
<msg type="info" file="Xst" num="2169" delta="unknown" >HDL ADVISOR - Some clock signals were not automatically buffered by XST with BUFG/BUFR resources. Please use the buffer_type constraint in order to insert these buffers to the clock signals to help prevent skew problems.
</msg>
</messages>
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