?? cepin.fit
字號:
-- MAX+plus II Compiler Fit File
-- Version 10.23 07/09/2003
-- Compiled: 05/19/2007 10:56:40
-- Copyright (C) 1988-2003 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
CHIP "cepin"
BEGIN
DEVICE = "EPM7096QC100-7";
UNROUTED;
"bz" : INPUT_PIN = ANY ;
"bz" : UNROUTED ;
"cl" : INPUT_PIN = ANY ;
"cl" : UNROUTED ;
"dc" : INPUT_PIN = ANY ;
"dc" : UNROUTED ;
"rst" : INPUT_PIN = ANY ;
"rst" : UNROUTED ;
"bzclk0" : OUTPUT_PIN = ANY ;
"bzclk0" : UNROUTED ;
"bzclk1" : OUTPUT_PIN = ANY ;
"bzclk1" : UNROUTED ;
"bzclk2" : OUTPUT_PIN = ANY ;
"bzclk2" : UNROUTED ;
"bzclk3" : OUTPUT_PIN = ANY ;
"bzclk3" : UNROUTED ;
"bzclk4" : OUTPUT_PIN = ANY ;
"bzclk4" : UNROUTED ;
"bzclk5" : OUTPUT_PIN = ANY ;
"bzclk5" : UNROUTED ;
"bzclk6" : OUTPUT_PIN = ANY ;
"bzclk6" : UNROUTED ;
"bzclk7" : OUTPUT_PIN = ANY ;
"bzclk7" : UNROUTED ;
"bzclk8" : OUTPUT_PIN = ANY ;
"bzclk8" : UNROUTED ;
"bzclk9" : OUTPUT_PIN = ANY ;
"bzclk9" : UNROUTED ;
"bzclk10" : OUTPUT_PIN = ANY ;
"bzclk10" : UNROUTED ;
"bzclk11" : OUTPUT_PIN = ANY ;
"bzclk11" : UNROUTED ;
"bzclk12" : OUTPUT_PIN = ANY ;
"bzclk12" : UNROUTED ;
"bzclk13" : OUTPUT_PIN = ANY ;
"bzclk13" : UNROUTED ;
"bzclk14" : OUTPUT_PIN = ANY ;
"bzclk14" : UNROUTED ;
"bzclk15" : OUTPUT_PIN = ANY ;
"bzclk15" : UNROUTED ;
"bzclk16" : OUTPUT_PIN = ANY ;
"bzclk16" : UNROUTED ;
"bzclk17" : OUTPUT_PIN = ANY ;
"bzclk17" : UNROUTED ;
"bzclk18" : OUTPUT_PIN = ANY ;
"bzclk18" : UNROUTED ;
"bzclk19" : OUTPUT_PIN = ANY ;
"bzclk19" : UNROUTED ;
"bzclk20" : OUTPUT_PIN = ANY ;
"bzclk20" : UNROUTED ;
"bzclk21" : OUTPUT_PIN = ANY ;
"bzclk21" : UNROUTED ;
"bzclk22" : OUTPUT_PIN = ANY ;
"bzclk22" : UNROUTED ;
"bzclk23" : OUTPUT_PIN = ANY ;
"bzclk23" : UNROUTED ;
"bzclk24" : OUTPUT_PIN = ANY ;
"bzclk24" : UNROUTED ;
"bzclk25" : OUTPUT_PIN = ANY ;
"bzclk25" : UNROUTED ;
"bzclk26" : OUTPUT_PIN = ANY ;
"bzclk26" : UNROUTED ;
"bzclk27" : OUTPUT_PIN = ANY ;
"bzclk27" : UNROUTED ;
"bzclk28" : OUTPUT_PIN = ANY ;
"bzclk28" : UNROUTED ;
"bzclk29" : OUTPUT_PIN = ANY ;
"bzclk29" : UNROUTED ;
"bzclk30" : OUTPUT_PIN = ANY ;
"bzclk30" : UNROUTED ;
"bzclk31" : OUTPUT_PIN = ANY ;
"bzclk31" : UNROUTED ;
"dcclk0" : OUTPUT_PIN = ANY ;
"dcclk0" : UNROUTED ;
"dcclk1" : OUTPUT_PIN = ANY ;
"dcclk1" : UNROUTED ;
"dcclk2" : OUTPUT_PIN = ANY ;
"dcclk2" : UNROUTED ;
"dcclk3" : OUTPUT_PIN = ANY ;
"dcclk3" : UNROUTED ;
"dcclk4" : OUTPUT_PIN = ANY ;
"dcclk4" : UNROUTED ;
"dcclk5" : OUTPUT_PIN = ANY ;
"dcclk5" : UNROUTED ;
"dcclk6" : OUTPUT_PIN = ANY ;
"dcclk6" : UNROUTED ;
"dcclk7" : OUTPUT_PIN = ANY ;
"dcclk7" : UNROUTED ;
"dcclk8" : OUTPUT_PIN = ANY ;
"dcclk8" : UNROUTED ;
"dcclk9" : OUTPUT_PIN = ANY ;
"dcclk9" : UNROUTED ;
"dcclk10" : OUTPUT_PIN = ANY ;
"dcclk10" : UNROUTED ;
"dcclk11" : OUTPUT_PIN = ANY ;
"dcclk11" : UNROUTED ;
"dcclk12" : OUTPUT_PIN = ANY ;
"dcclk12" : UNROUTED ;
"dcclk13" : OUTPUT_PIN = ANY ;
"dcclk13" : UNROUTED ;
"dcclk14" : OUTPUT_PIN = ANY ;
"dcclk14" : UNROUTED ;
"dcclk15" : OUTPUT_PIN = ANY ;
"dcclk15" : UNROUTED ;
"dcclk16" : OUTPUT_PIN = ANY ;
"dcclk16" : UNROUTED ;
"dcclk17" : OUTPUT_PIN = ANY ;
"dcclk17" : UNROUTED ;
"dcclk18" : OUTPUT_PIN = ANY ;
"dcclk18" : UNROUTED ;
"dcclk19" : OUTPUT_PIN = ANY ;
"dcclk19" : UNROUTED ;
"dcclk20" : OUTPUT_PIN = ANY ;
"dcclk20" : UNROUTED ;
"dcclk21" : OUTPUT_PIN = ANY ;
"dcclk21" : UNROUTED ;
"dcclk22" : OUTPUT_PIN = ANY ;
"dcclk22" : UNROUTED ;
"dcclk23" : OUTPUT_PIN = ANY ;
"dcclk23" : UNROUTED ;
"dcclk24" : OUTPUT_PIN = ANY ;
"dcclk24" : UNROUTED ;
"dcclk25" : OUTPUT_PIN = ANY ;
"dcclk25" : UNROUTED ;
"dcclk26" : OUTPUT_PIN = ANY ;
"dcclk26" : UNROUTED ;
"dcclk27" : OUTPUT_PIN = ANY ;
"dcclk27" : UNROUTED ;
"dcclk28" : OUTPUT_PIN = ANY ;
"dcclk28" : UNROUTED ;
"dcclk29" : OUTPUT_PIN = ANY ;
"dcclk29" : UNROUTED ;
"dcclk30" : OUTPUT_PIN = ANY ;
"dcclk30" : UNROUTED ;
"dcclk31" : OUTPUT_PIN = ANY ;
"dcclk31" : UNROUTED ;
"|LPM_ADD_SUB:2989|addcore:adder|addcore:adder0|result_node1" : LOCATION = ANY ;
"|LPM_ADD_SUB:2989|addcore:adder|addcore:adder0|result_node1" : UNROUTED ;
"|LPM_ADD_SUB:2989|addcore:adder|addcore:adder0|result_node2" : LOCATION = ANY ;
"|LPM_ADD_SUB:2989|addcore:adder|addcore:adder0|result_node2" : UNROUTED ;
"|LPM_ADD_SUB:2989|addcore:adder|addcore:adder0|result_node3" : LOCATION = ANY ;
"|LPM_ADD_SUB:2989|addcore:adder|addcore:adder0|result_node3" : UNROUTED ;
"|LPM_ADD_SUB:5101|addcore:adder|addcore:adder0|gcp2" : LOCATION = ANY ;
"|LPM_ADD_SUB:5101|addcore:adder|addcore:adder0|gcp2" : UNROUTED ;
"|LPM_ADD_SUB:5629|addcore:adder|addcore:adder0|gcp2" : LOCATION = ANY ;
"|LPM_ADD_SUB:5629|addcore:adder|addcore:adder0|gcp2" : UNROUTED ;
"|LPM_ADD_SUB:6157|addcore:adder|addcore:adder0|gcp2" : LOCATION = ANY ;
"|LPM_ADD_SUB:6157|addcore:adder|addcore:adder0|gcp2" : UNROUTED ;
"|LPM_ADD_SUB:6685|addcore:adder|addcore:adder0|gcp2" : LOCATION = ANY ;
"|LPM_ADD_SUB:6685|addcore:adder|addcore:adder0|gcp2" : UNROUTED ;
"|LPM_ADD_SUB:9465|addcore:adder|addcore:adder0|result_node1" : LOCATION = ANY ;
"|LPM_ADD_SUB:9465|addcore:adder|addcore:adder0|result_node1" : UNROUTED ;
"|LPM_ADD_SUB:9465|addcore:adder|addcore:adder0|result_node2" : LOCATION = ANY ;
"|LPM_ADD_SUB:9465|addcore:adder|addcore:adder0|result_node2" : UNROUTED ;
"|LPM_ADD_SUB:9465|addcore:adder|addcore:adder0|result_node3" : LOCATION = ANY ;
"|LPM_ADD_SUB:9465|addcore:adder|addcore:adder0|result_node3" : UNROUTED ;
"|LPM_ADD_SUB:11049|addcore:adder|addcore:adder0|gcp2" : LOCATION = ANY ;
"|LPM_ADD_SUB:11049|addcore:adder|addcore:adder0|gcp2" : UNROUTED ;
"|LPM_ADD_SUB:11049|addcore:adder|addcore:adder0|result_node2" : LOCATION = ANY ;
"|LPM_ADD_SUB:11049|addcore:adder|addcore:adder0|result_node2" : UNROUTED ;
"|LPM_ADD_SUB:11577|addcore:adder|addcore:adder0|gcp2" : LOCATION = ANY ;
"|LPM_ADD_SUB:11577|addcore:adder|addcore:adder0|gcp2" : UNROUTED ;
"|LPM_ADD_SUB:12105|addcore:adder|addcore:adder0|gcp2" : LOCATION = ANY ;
"|LPM_ADD_SUB:12105|addcore:adder|addcore:adder0|gcp2" : UNROUTED ;
"|LPM_ADD_SUB:12633|addcore:adder|addcore:adder0|gcp2" : LOCATION = ANY ;
"|LPM_ADD_SUB:12633|addcore:adder|addcore:adder0|gcp2" : UNROUTED ;
"|LPM_ADD_SUB:13161|addcore:adder|addcore:adder0|gcp2" : LOCATION = ANY ;
"|LPM_ADD_SUB:13161|addcore:adder|addcore:adder0|gcp2" : UNROUTED ;
":133" : LOCATION = ANY ; -- bzclk131
":133" : UNROUTED ;
":134" : LOCATION = ANY ; -- bzclk130
":134" : UNROUTED ;
":135" : LOCATION = ANY ; -- bzclk129
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