library ieee;
use ieee.std_logic_1164.all;

entity batlatch is
  port (clk,hit1_in,hit2_in,hit3_in,hit4_in,out_in,resetn,start: in std_logic;
        hit1_out,hit2_out,hit3_out,hit4_out,out_out : out std_logic);
end;

architecture behavior of batlatch is
  type type_sreg is (batter_out,fair,homerun,idle,three_base,two_base,
                     wait_stop);
  signal sreg, next_sreg : type_sreg;
  signal next_hit1_out,next_hit2_out,next_hit3_out,next_hit4_out,next_out_out : std_logic;
begin
  process (clk, resetn)
  begin
    if resetn='0' then
      sreg <= idle;
      hit1_out <= '0';
      hit2_out <= '0';
      hit3_out <= '0';
      hit4_out <= '0';
      out_out <= '0';
    elsif clk='1' and clk'event then
      sreg <= next_sreg;
      hit1_out <= next_hit1_out;
      hit2_out <= next_hit2_out;
      hit3_out <= next_hit3_out;
      hit4_out <= next_hit4_out;
      out_out <= next_out_out;
    end if;
  end process;

  process (sreg,hit1_in,hit2_in,hit3_in,hit4_in,out_in,start)
  begin
    case sreg is
      when batter_out =>
          next_sreg<=idle;
          next_hit1_out<='0';
          next_hit2_out<='0';
          next_hit3_out<='0';
          next_hit4_out<='0';
          next_out_out<='0';
      when fair =>
          next_sreg<=idle;
          next_hit1_out<='0';
          next_hit2_out<='0';
          next_hit3_out<='0';
          next_hit4_out<='0';
          next_out_out<='0';
      when homerun =>
          next_sreg<=idle;
          next_hit1_out<='0';
          next_hit2_out<='0';
          next_hit3_out<='0';
          next_hit4_out<='0';
          next_out_out<='0';
      when idle =>
        if start='1' then
          next_sreg<=wait_stop;
          next_hit1_out<='0';
          next_hit2_out<='0';
          next_hit3_out<='0';
          next_hit4_out<='0';
          next_out_out<='0';
        else
          next_sreg<=idle;
          next_hit1_out<='0';
          next_hit2_out<='0';
          next_hit3_out<='0';
          next_hit4_out<='0';
          next_out_out<='0';
        end if;
      when three_base =>
          next_sreg<=idle;
          next_hit1_out<='0';
          next_hit2_out<='0';
          next_hit3_out<='0';
          next_hit4_out<='0';
          next_out_out<='0';
      when two_base =>
          next_sreg<=idle;
          next_hit1_out<='0';
          next_hit2_out<='0';
          next_hit3_out<='0';
          next_hit4_out<='0';
          next_out_out<='0';
      when wait_stop =>
        if  not (((hit1_in='1') and (hit2_in='0') and (hit3_in='0') and (hit4_in='0') and (out_in='0') and (start='0')) or
                 ((hit1_in='0') and (hit2_in='1') and (hit3_in='0') and (hit4_in='0') and (out_in='0') and (start='0')) or
                 ((hit1_in='0') and (hit2_in='0') and (hit3_in='1') and (hit4_in='0') and (out_in='0') and (start='0')) or
                 ((hit1_in='0') and (hit2_in='0') and (hit3_in='0') and (hit4_in='1') and (out_in='0') and (start='0')) or
                 ((hit1_in='0') and (hit2_in='0') and (hit3_in='0') and (hit4_in='0') and (out_in='1') and (start='0'))) then
          next_sreg<=wait_stop;
          next_hit1_out<='0';
          next_hit2_out<='0';
          next_hit3_out<='0';
          next_hit4_out<='0';
          next_out_out<='0';
        end if;
        if (hit1_in='1') and (hit2_in='0') and (hit3_in='0') and (hit4_in='0') and (out_in='0') and (start='0') then
          next_sreg<=fair;
          next_hit2_out<='0';
          next_hit3_out<='0';
          next_hit4_out<='0';
          next_out_out<='0';
          next_hit1_out<='1';
        end if;
        if (hit1_in='0') and (hit2_in='1') and (hit3_in='0') and (hit4_in='0') and (out_in='0') and (start='0') then
          next_sreg<=two_base;
          next_hit1_out<='0';
          next_hit3_out<='0';
          next_hit4_out<='0';
          next_out_out<='0';
          next_hit2_out<='1';
        end if;
        if (hit1_in='0') and (hit2_in='0') and (hit3_in='1') and (hit4_in='0') and (out_in='0') and (start='0') then
          next_sreg<=three_base;
          next_hit1_out<='0';
          next_hit2_out<='0';
          next_hit4_out<='0';
          next_out_out<='0';
          next_hit3_out<='1';
        end if;
        if (hit1_in='0') and (hit2_in='0') and (hit3_in='0') and (hit4_in='1') and (out_in='0') and (start='0') then
          next_sreg<=homerun;
          next_hit1_out<='0';
          next_hit2_out<='0';
          next_hit3_out<='0';
          next_out_out<='0';
          next_hit4_out<='1';
        end if;
        if (hit1_in='0') and (hit2_in='0') and (hit3_in='0') and (hit4_in='0') and (out_in='1') and (start='0') then
          next_sreg<=batter_out;
          next_hit1_out<='0';
          next_hit2_out<='0';
          next_hit3_out<='0';
          next_hit4_out<='0';
          next_out_out<='1';
        end if;
      when others =>
    end case;
  end process;
end behavior;