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<h1>Burst Flash Controller Interface Peripheral</h1>
<null><a name="BFC"></a><b>BFC</b> <i><font size="-1">(<a href="AT91RM9200_h.html#AT91S_BFC">AT91S_BFC</a>)</font></i><b> 0xFFFFFFC0 </b><i><font size="-1">(<a href="AT91RM9200_h.html#AT91C_BASE_BFC">AT91C_BASE_BFC</a>)</font></i>
<br></null><a name="BFC"></a><h2>BFC Software API <i><font size="-1">(<a href="AT91RM9200_h.html#AT91S_BFC">AT91S_BFC</a>)</font></i></h2>
<a name="BFC"></a><null><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><font size="-1"><b>Offset</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Field</b></font></th><th bgcolor="#FFFFCC"><font size="-1"><b>Description</b></font></th>
<tr><td align="CENTER" bgcolor="#FFFFCC"><font size="-1"><b>0x0</b></font></td><td><font size="-1"><a href="AT91RM9200_BFC.html#BFC_MR">BFC_MR</a></font></td><td><font size="-1">BFC Mode Register</font></td></tr>
</null></table><br></null><h2>BFC Register Description</h2>
<null><a name="BFC_MR"></a><h4><a href="#BFC">BFC</a>: <i><a href="AT91RM9200_h.html#AT91_REG">AT91_REG</a></i> BFC_MR <i>BFC Mode Register</i></h4><ul><null><font size="-2"><li><b>BFC</b> <i><a href="AT91RM9200_h.html#AT91C_BFC_MR">AT91C_BFC_MR</a></i> 0xFFFFFFC0</font></null></ul><table border=1 cellpadding=0 cellspacing=0 width="100%"><null><th bgcolor="#FFFFCC"><b>Offset</b></th><th bgcolor="#FFFFCC"><b>Name</b></th><th bgcolor="#FFFFCC"><b>Description</b></th><tr><td align="CENTER" bgcolor="#FFFFCC">1..0</td><td align="CENTER"><a name="BFC_BFCOM"></a><b>BFC_BFCOM</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_BFC_BFCOM">AT91C_BFC_BFCOM</a></font></td><td><b>Burst Flash Controller Operating Mode</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="BFC_BFCOM_DISABLED"></a><b>BFC_BFCOM_DISABLED</b><font size="-1"><br><a href="AT91RM9200_h.html#AT91C_BFC_BFCOM_DISABLED">AT91C_BFC_BFCOM_DISABLED</a></font></td><td><br>NPCS0 is driven by the SMC or remains high.</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="BFC_BFCOM_ASYNC"></a><b>BFC_BFCOM_ASYNC</b><font size="-1"><br><a href="AT91RM9200_h.html#AT91C_BFC_BFCOM_ASYNC">AT91C_BFC_BFCOM_ASYNC</a></font></td><td><br>Asynchronous</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="BFC_BFCOM_BURST_READ"></a><b>BFC_BFCOM_BURST_READ</b><font size="-1"><br><a href="AT91RM9200_h.html#AT91C_BFC_BFCOM_BURST_READ">AT91C_BFC_BFCOM_BURST_READ</a></font></td><td><br>Burst Read</td></tr>
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<tr><td align="CENTER" bgcolor="#FFFFCC">3..2</td><td align="CENTER"><a name="BFC_BFCC"></a><b>BFC_BFCC</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_BFC_BFCC">AT91C_BFC_BFCC</a></font></td><td><b>Burst Flash Controller Operating Mode</b><font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">1</td><td align="CENTER"><a name="BFC_BFCC_MCK"></a><b>BFC_BFCC_MCK</b><font size="-1"><br><a href="AT91RM9200_h.html#AT91C_BFC_BFCC_MCK">AT91C_BFC_BFCC_MCK</a></font></td><td><br>Master Clock.</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="BFC_BFCC_MCK_DIV_2"></a><b>BFC_BFCC_MCK_DIV_2</b><font size="-1"><br><a href="AT91RM9200_h.html#AT91C_BFC_BFCC_MCK_DIV_2">AT91C_BFC_BFCC_MCK_DIV_2</a></font></td><td><br>Master Clock divided by 2.</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="BFC_BFCC_MCK_DIV_4"></a><b>BFC_BFCC_MCK_DIV_4</b><font size="-1"><br><a href="AT91RM9200_h.html#AT91C_BFC_BFCC_MCK_DIV_4">AT91C_BFC_BFCC_MCK_DIV_4</a></font></td><td><br>Master Clock divided by 4.</td></tr>
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<tr><td align="CENTER" bgcolor="#FFFFCC">7..4</td><td align="CENTER"><a name="BFC_AVL"></a><b>BFC_AVL</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_BFC_AVL">AT91C_BFC_AVL</a></font></td><td><b>Address Valid Latency</b><br>This field defines the number of BFC Clock Cycles required to wait until the first data is received.<br>This number equals (AVL+1).</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">10..8</td><td align="CENTER"><a name="BFC_PAGES"></a><b>BFC_PAGES</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_BFC_PAGES">AT91C_BFC_PAGES</a></font></td><td><b>Page Size</b><br>This field defines the page size handling and the page size.<font size="-1"><table bgcolor="#E3F2FF" border=1 cellpadding=0 cellspacing=0 width="100%"><null><th><b>Value</b></th><th><b>Label</b></th><th><b>Description</b></th><tr><td align="CENTER">0</td><td align="CENTER"><a name="BFC_PAGES_NO_PAGE"></a><b>BFC_PAGES_NO_PAGE</b><font size="-1"><br><a href="AT91RM9200_h.html#AT91C_BFC_PAGES_NO_PAGE">AT91C_BFC_PAGES_NO_PAGE</a></font></td><td><br>No page handling.</td></tr>
<tr><td align="CENTER">1</td><td align="CENTER"><a name="BFC_PAGES_16"></a><b>BFC_PAGES_16</b><font size="-1"><br><a href="AT91RM9200_h.html#AT91C_BFC_PAGES_16">AT91C_BFC_PAGES_16</a></font></td><td><br>16 bytes page size.</td></tr>
<tr><td align="CENTER">2</td><td align="CENTER"><a name="BFC_PAGES_32"></a><b>BFC_PAGES_32</b><font size="-1"><br><a href="AT91RM9200_h.html#AT91C_BFC_PAGES_32">AT91C_BFC_PAGES_32</a></font></td><td><br>32 bytes page size.</td></tr>
<tr><td align="CENTER">3</td><td align="CENTER"><a name="BFC_PAGES_64"></a><b>BFC_PAGES_64</b><font size="-1"><br><a href="AT91RM9200_h.html#AT91C_BFC_PAGES_64">AT91C_BFC_PAGES_64</a></font></td><td><br>64 bytes page size.</td></tr>
<tr><td align="CENTER">4</td><td align="CENTER"><a name="BFC_PAGES_128"></a><b>BFC_PAGES_128</b><font size="-1"><br><a href="AT91RM9200_h.html#AT91C_BFC_PAGES_128">AT91C_BFC_PAGES_128</a></font></td><td><br>128 bytes page size.</td></tr>
<tr><td align="CENTER">5</td><td align="CENTER"><a name="BFC_PAGES_256"></a><b>BFC_PAGES_256</b><font size="-1"><br><a href="AT91RM9200_h.html#AT91C_BFC_PAGES_256">AT91C_BFC_PAGES_256</a></font></td><td><br>256 bytes page size.</td></tr>
<tr><td align="CENTER">6</td><td align="CENTER"><a name="BFC_PAGES_512"></a><b>BFC_PAGES_512</b><font size="-1"><br><a href="AT91RM9200_h.html#AT91C_BFC_PAGES_512">AT91C_BFC_PAGES_512</a></font></td><td><br>512 bytes page size.</td></tr>
<tr><td align="CENTER">7</td><td align="CENTER"><a name="BFC_PAGES_1024"></a><b>BFC_PAGES_1024</b><font size="-1"><br><a href="AT91RM9200_h.html#AT91C_BFC_PAGES_1024">AT91C_BFC_PAGES_1024</a></font></td><td><br>1024 bytes page size.</td></tr>
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<tr><td align="CENTER" bgcolor="#FFFFCC">13..12</td><td align="CENTER"><a name="BFC_OEL"></a><b>BFC_OEL</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_BFC_OEL">AT91C_BFC_OEL</a></font></td><td><b>Output Enable Latency</b><br>This field defines the number of idle cycles inserted after each level change on the bfoe output enable signal.<br>OEL is between 1 and 3.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">16</td><td align="CENTER"><a name="BFC_BAAEN"></a><b>BFC_BAAEN</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_BFC_BAAEN">AT91C_BFC_BAAEN</a></font></td><td><b>Burst Address Advance Enable</b><br>0 = The burst clock is enabled to increment the burst address or, disabled to remain at the same address.<br>1 = The burst clock is continuous and the burst address advance is controlled with the bfbaa pin.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">17</td><td align="CENTER"><a name="BFC_BFOEH"></a><b>BFC_BFOEH</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_BFC_BFOEH">AT91C_BFC_BFOEH</a></font></td><td><b>Burst Flash Output Enable Handling</b></td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">18</td><td align="CENTER"><a name="BFC_MUXEN"></a><b>BFC_MUXEN</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_BFC_MUXEN">AT91C_BFC_MUXEN</a></font></td><td><b>Multiplexed Bus Enable</b><br>0 = The address and data buses operate independently.<br>1 = The address and data buses are multiplexed.<br>Actually, the address is presented on both the data bus and the address bus when the bfavd signal is asserted.</td></tr>
<tr><td align="CENTER" bgcolor="#FFFFCC">19</td><td align="CENTER"><a name="BFC_RDYEN"></a><b>BFC_RDYEN</b><font size="-2"><br><a href="AT91RM9200_h.html#AT91C_BFC_RDYEN">AT91C_BFC_RDYEN</a></font></td><td><b>Ready Enable Mode</b><br>0 = The bfrdy input signal at the BFC input is ignored.<br>1 = The bfrdy input signal is used as an indicator of data availability in the next cycle.</td></tr>
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