?? iiceep.c
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/***************************************************************************
* This code and information is provided "as is" without warranty of any *
* kind, either expressed or implied, including but not limited to the *
* implied warranties of merchantability and/or fitness for a particular *
* purpose. *
* *
* Copyright (C) 2006 Teridian Semiconductor Corp. All Rights Reserved. *
***************************************************************************/
//**************************************************************************
// DESCRIPTION: 71M6521B POWER METER - Serial EEPROM Routines.
//
// AUTHOR: RGV
//
// HISTORY: See end of file
//**************************************************************************
// File: IICEEP.C
// This implements a polling IIC bus interface using the chip's
// EEPROM interface.
//
//**************************************************************************
// IIC API.
//
#include "options.h"
#if I2C_POLLED && !I2C_FAST
#include "iic.h"
// change this stuff for new hardware
// more than 31 cycle delay, so EECTRL has valid status at 4.9Mhz MPU clock
// and so start sequence is correct after stop sequence (requires 20 cycles).
static volatile uint8_t delay;
#pragma save
#pragma NOAREGS
void delay_sub(void) small reentrant // call is 12 cycles
{
delay = 0; // 12 cycles, CLR
delay = 1; // 12 cycles, SET
} // ret is 5 cycles ; total is 41 cycles, at least
#pragma restore
#define DELAY_SUB \
delay_sub()
// waits for busy bit to indicate that the previous command is complete
#define BUSY_WAIT \
do { \
status = EECTRL; \
} while((status & EE_BUSY) != 0)
// NO-OP reduces activity, somewhat reducing power use
// It clears busy so fast that the unbusy loop doesn't catch it.
#define NOOP \
BUSY_WAIT; \
EECTRL = EE_NOOP; \
DELAY_SUB
// The start condition has the data change while the clock is high,
// but ends with the clock low so the clock can clock bits.
// If sent immediately after a stop, a 20 cycle wait has to be after
// busy becomes zero.
#define START_CONDITION \
BUSY_WAIT; \
DELAY_SUB; \
EECTRL = EE_START; \
DELAY_SUB
// the stop condition makes the data go high when the clock is high
// It has to end with both lines high.
// It clears busy so fast that the unbusy loop doesn't catch it.
#define STOP_CONDITION \
BUSY_WAIT; \
EECTRL = EE_STOP; \
DELAY_SUB; \
NOOP
#define ACK (status & EE_RX_ACK)
#define PUT_BYTE(_b_) \
EEDATA = _b_; \
EECTRL = EE_TX; \
DELAY_SUB; \
BUSY_WAIT
#define GET_BYTE(_b_) \
EECTRL = EE_RCV_ACK; \
DELAY_SUB; \
BUSY_WAIT; \
_b_ = EEDATA
#define GET_BYTE_NO_ACK(_b_) \
EECTRL = EE_RCV; \
DELAY_SUB; \
BUSY_WAIT; \
_b_ = EEDATA
#pragma save
#pragma NOAREGS
void IICInit(void) small reentrant
{
uint8_t status;
#if TRACE10 || M6520
if ((LCDX & LCD_NUM) > 16) // DIO_4 and DIO_5 may not be LCD segments
{
LCDX = 16 | (LCDX & ~LCD_NUM);
}
#elif M6530
#else
#error unknown device
#endif
EX_EEPROM = FALSE; // Disable EEPROM non-busy interrupt.
DIO = (DIO & ~DIO_EEX) | DIO_EEX_2W; // DIO_4 and DIO_5 become EEPROM interface.
STOP_CONDITION;
}
#pragma restore
// stub the "get a bit" function used to reset some parts
#pragma save
#pragma NOAREGS
uint8_t IICGetBit(void) small reentrant
{
return 0;
}
#pragma restore
// start of portable code
// an IIC bus's start condition
#pragma save
#pragma NOAREGS
void IICStart(void) small reentrant
{
uint8_t status;
EX_EEPROM = FALSE; // Disable EEPROM non-busy interrupt.
DIO = (DIO & ~DIO_EEX) | DIO_EEX_2W; // DIO_4 and DIO_5 become EEPROM interface.
START_CONDITION;
}
#pragma restore
// an IIC bus's ending condition
#pragma save
#pragma NOAREGS
void IICStop(void) small reentrant
{
uint8_t status;
STOP_CONDITION;
DIO = (DIO & ~DIO_EEX); // DIO_4 and DIO_5 become DIOs.
}
#pragma restore
// transmit a counted string of bytes to an IIC bus
#pragma save
#pragma NOAREGS
uint8_t IICWrite(uint8x_t *pchOut, int16_t cnt) small reentrant
{
uint8_t b, status;
uint8_t ack;
BUSY_WAIT; // until previous command completes
for(ack = 0; (0 == ack) && (cnt > 0); --cnt)
{
b = *pchOut++;
PUT_BYTE(b);
ack = ACK ? 1 : 0; // get the ack bit
}
NOOP; // stop the state machine
return ack;
}
#pragma restore
#if CLI
// transmit a counted string of identical bytes to an IIC bus
#pragma save
#pragma NOAREGS
uint8_t IICPad(int16_t cnt, uint8_t bIn) small reentrant
{
uint8_t b, status;
uint8_t ack;
b = bIn;
BUSY_WAIT; // until previous command completes
for(ack = 0; (0 == ack) && (cnt > 0); --cnt)
{
PUT_BYTE(b);
ack = ACK ? 1 : 0; // get the ack bit
}
NOOP; // stop the state machine
return ack;
}
#pragma restore
#endif
// receive a counted string of bytes from an IIC bus
#pragma save
#pragma NOAREGS
void IICRead(uint8x_t *pchIn, int16_t cnt) small reentrant
{
uint8_t b, status;
if (cnt > 0)
{
BUSY_WAIT; // until previous command completes
while(cnt > 0)
{
if (--cnt == 0)
{
GET_BYTE_NO_ACK(b); // get the last byte from the bus
*pchIn++ = b; // store it
break;
}
else
{
GET_BYTE(b); // get a byte from the bus
*pchIn++ = b; // store it
}
}
NOOP; // stop the state machine
}
}
#pragma restore
#endif // EEPROM
/***************************************************************************
* $Log: iiceep.c,v $
* Revision 1.23 2006/10/13 00:47:29 tvander
* Removed compile options for 6530, 6515;
* renamed 6511 and 6513 to trace11 and trace13;
* Binary verified unchanged from previous version.
*
* Revision 1.22 2006/09/09 01:09:33 gmikef
* *** empty log message ***
*
* Revision 1.21 2006/06/29 00:55:48 tvander
* Marked NOAREGS on reentrant routines that needed it.
*
* Revision 1.20 2006/06/15 16:36:56 tvander
* Fixed reentrancy on iiceep.c and eepromp.c
* Made parallel code changes to microwire eeprom drivers.
*
* Revision 1.19 2006/05/18 23:18:45 tvander
* 16K and 32K
* First cut at new requirements.
* 32K 6521 is grossly tested.
* All others have a clean compile with C51 8.02
*
* Revision 1.18 2006/03/08 00:00:57 tvander
* Revised IO so that multiplexed interrupts are centralized in io65xx.c
* Added default interrupts to io65xx.c
* Clean build.
* Tested CE, serial.
* interrupting EEPROM driver fails.
*
* Revision 1.17 2006/03/06 03:31:32 Michael T. Fischer
* More 6530 prep.
*
* Revision 1.16 2006/03/03 11:26:02 Michael T. Fischer
* Prep for 6530 LCD, etc.
*
* Revision 1.15 2006/01/16 20:11:22 tvander
* Clean Keil build, all versions
*
* Revision 1.13 2005/11/05 02:14:00 tvander
* Fixed build
*
* Revision 1.12 2005/11/05 01:56:27 tvander
* Added EEPROM erase; Note uwreep.c is not working; don't know why.
*
* Revision 1.11 2005/10/31 17:37:59 tvander
* Includes improved EEPROM code with uwire.
* Clean build, all build trees (Thank-you, Mike!)
*
* Revision 1.10 2005/10/20 18:39:41 tvander
* Ported 2-wire EEPROM code from 6511/6513, including interrupting version, polling version for DIO, and polling version using the 2-wire logic.
*
* Revision 1.9 2005/09/22 23:45:05 tvander
* Clean build all models and unit tests, updated copyright to be fore Teridian
*
* Revision 1.8 2005/08/28 02:13:49 gmikef
* *** empty log message ***
*
* Revision 1.7 2005/08/16 02:28:30 gmikef
* Remapped LCD for 6520 Eval Board.
* Mapped CE code location to address of 'CeCode'.
*
* Revision 1.6 2005/05/03 00:39:44 tvander
* Incorporated event reporting in tmr0,tmr1 and unit tests.
* Retested stm, trm0, tmr1.
* Incorporated untested changes in io651x.h
*
* Revision 1.5 2005/04/21 01:59:54 gmikef
* *** empty log message ***
*
* Revision 1.7 2005/04/09 02:04:25 gmikef
* *** empty log message ***
*
* Revision 1.4 2005/03/23 19:19:31 tvander
* Added untested timer functions.
* Updated iicdio and iiceep to reflect improvements in 6510 code.
* ser0 and ser1 updated to provide features for flag.
*
* Revision 1.3 2005/03/22 00:56:00 tvander
* Rolled date
* Changed misc.c to disable interrupts in Ce_Int_Enable().
* Changed calls to memcpy_xp to never write outside the buffer.
* Changed the help files to be more accurate.
*
* Revision 1.3 2005/03/12 00:16:59 tvander
* Integrated memory types.
*
* Revision 1.2 2005/03/11 22:57:03 tvander
* Added bool, and 8/16/32 data structures
*
* Revision 1.1 2005/03/11 22:19:15 tvander
* *** empty log message ***
*
* Revision 1.2 2005/02/17 18:32:26 tvander
* Added automatic check-in logging to all source code.
*
* 2004 DECEMBER 22; First Version
*
* Revision 1.1 2005/02/01 20:04:41 tvander
* Reorganization
*
* Revision 1.4 2005/01/26 19:51:48 tvander
* Added update log
*
* Copyright (C) 2005 Teridian Semiconductor Corp. All Rights Reserved. *
* this program is fully protected by the United States copyright *
* laws and is the property of Teridian Semiconductor Corporation. *
***************************************************************************/
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