`timescale 1ns/1ns                                                 
                                                                   
module Ham_Code_16R(clk, rst, req, cin, datain, dataout, ack);       
//input	signal                                                     
input 		clk,rst;                                           
input		req;                                               
input	[15:0]	datain;                                            
input	[11:0]	cin;                                               
                                                                   
//output signal                                                    
output	[15:0]	dataout;                                           
output		ack;

wire	[3:0]	dataina,datainb,datainc,dataind;           
wire	[2:0]	cina,cinb,cinc,cind;                   
wire	[3:0]	dataouta,dataoutb,dataoutc,dataoutd;       

wire		req1 = req;  
wire		req2 = req;  
wire		req3 = req;  
wire		req4 = req;  
wire		ack1,ack2,ack3,ack4;		
wire		ack = ack1 | ack2 | ack3 | ack4;


//datain                               
assign	dataina = datain [ 3: 0];      
assign	datainb = datain [ 7: 4];      
assign	datainc = datain [11: 8];      
assign	dataind = datain [15:12];      
//cout                                 
assign	cina	= cin [ 2:0];         
assign	cinb	= cin [ 5:3];         
assign	cinc	= cin [ 8:6];         
assign	cind	= cin [11:9];         
//dataout                              
assign 	dataout[ 3: 0] = dataouta;     
assign 	dataout[ 7: 4] = dataoutb;     
assign 	dataout[11: 8] = dataoutc;     
assign 	dataout[15:12] = dataoutd;     


Ham_Code_R 	HR1	(                                                                                  
			 .clk		(clk		),          
			 .rst		(rst		),          
			 .req		(req1		),          
			 .datain	(dataina	),          
			 .cin		(cina		),          
			 .dataout	(dataouta	),          
			 .ack		(ack1		)           
			);                                  

Ham_Code_R 	HR2	(                                     			
			 .clk		(clk		),    
			 .rst		(rst		),    
			 .req		(req2		),    
			 .datain	(datainb	),    
			 .cin		(cinb		),    
			 .dataout	(dataoutb	),    
			 .ack		(ack2		)
			);                                    

Ham_Code_R 	HR3	(                                     			
			 .clk		(clk		),    
			 .rst		(rst		),    
			 .req		(req3		),    
			 .datain	(datainc	),    
			 .cin		(cinc		),    
			 .dataout	(dataoutc	),    
			 .ack		(ack3		)     
			);                   

Ham_Code_R 	HR4	(                                     			                 
			 .clk		(clk		),    
			 .rst		(rst		),    
			 .req		(req4		),    
			 .datain	(dataind	),    
			 .cin		(cind		),    
			 .dataout	(dataoutd	),    
			 .ack		(ack4		)     
			);                   
endmodule