-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
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-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
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-- applicable agreement for further details.
--led_out[1] is led_out[1]
--operation mode is normal

led_out[1]_lut_out = led_out[2];
led_out[1] = DFFEAS(led_out[1]_lut_out, clk, VCC, , A1L4, , , , );


--led_out[2] is led_out[2]
--operation mode is normal

led_out[2]_lut_out = led_out[3];
led_out[2] = DFFEAS(led_out[2]_lut_out, clk, VCC, , A1L4, , , , );


--led_out[3] is led_out[3]
--operation mode is normal

led_out[3]_lut_out = led_out[4];
led_out[3] = DFFEAS(led_out[3]_lut_out, clk, VCC, , A1L4, , , , );


--led_out[4] is led_out[4]
--operation mode is normal

led_out[4]_lut_out = led_out[5];
led_out[4] = DFFEAS(led_out[4]_lut_out, clk, VCC, , A1L4, , , , );


--led_out[5] is led_out[5]
--operation mode is normal

led_out[5]_lut_out = led_out[6];
led_out[5] = DFFEAS(led_out[5]_lut_out, clk, VCC, , A1L4, , , , );


--led_out[6] is led_out[6]
--operation mode is normal

led_out[6]_lut_out = !A1L44 # !led_out[4] # !led_out[3];
led_out[6] = DFFEAS(led_out[6]_lut_out, clk, VCC, , A1L4, , , , );


--A1L44 is rtl~23
--operation mode is normal

A1L44 = led_out[1] & led_out[2] & led_out[5] & led_out[6];


--A1L1 is Decoder~272
--operation mode is normal

A1L1 = led_out[4] & A1L44 & (!led_out[3]);


--A1L5 is Select~443
--operation mode is normal

A1L5 = led_out[5] & (led_out[2] & (led_out[3] $ led_out[4]) # !led_out[2] & led_out[3] & led_out[4]);


--A1L6 is Select~444
--operation mode is normal

A1L6 = A1L1 # !A1L5 # !led_out[6] # !led_out[1];


--A1L7 is Select~445
--operation mode is normal

A1L7 = led_out[6] & led_out[5] & (led_out[4] $ led_out[1]);


--A1L8 is Select~446
--operation mode is normal

A1L8 = led_out[2] & led_out[3] & A1L7;


--A1L9 is Select~447
--operation mode is normal

A1L9 = led_out[6] & (led_out[2] & (led_out[4] $ led_out[1]) # !led_out[2] & led_out[4] & led_out[1]);


--A1L10 is Select~448
--operation mode is normal

A1L10 = led_out[3] & led_out[5] & A1L9;


--A1L42 is reduce_or~107
--operation mode is normal

A1L42 = led_out[2] & (led_out[5] & (led_out[4] $ led_out[3]) # !led_out[5] & led_out[4] & led_out[3]) # !led_out[2] & led_out[5] & led_out[4] & led_out[3];


--A1L43 is reduce_or~108
--operation mode is normal

A1L43 = led_out[1] & led_out[6] & A1L42;


--A1L11 is Select~449
--operation mode is normal

A1L11 = led_out[3] & A1L44 & (!led_out[4]);


--delay[6] is delay[6]
--operation mode is arithmetic

delay[6]_carry_eqn = A1L25;
delay[6]_lut_out = delay[6] $ (!delay[6]_carry_eqn);
delay[6] = DFFEAS(delay[6]_lut_out, clk, VCC, , , , , A1L4, );

--A1L27 is delay[6]~111
--operation mode is arithmetic

A1L27 = CARRY(delay[6] & (!A1L25));


--delay[7] is delay[7]
--operation mode is normal

delay[7]_carry_eqn = A1L27;
delay[7]_lut_out = delay[7] $ (delay[7]_carry_eqn);
delay[7] = DFFEAS(delay[7]_lut_out, clk, VCC, , , , , A1L4, );


--delay[3] is delay[3]
--operation mode is arithmetic

delay[3]_carry_eqn = A1L19;
delay[3]_lut_out = delay[3] $ (delay[3]_carry_eqn);
delay[3] = DFFEAS(delay[3]_lut_out, clk, VCC, , , , , A1L4, );

--A1L21 is delay[3]~119
--operation mode is arithmetic

A1L21 = CARRY(!A1L19 # !delay[3]);


--delay[1] is delay[1]
--operation mode is arithmetic

delay[1]_carry_eqn = A1L15;
delay[1]_lut_out = delay[1] $ (delay[1]_carry_eqn);
delay[1] = DFFEAS(delay[1]_lut_out, clk, VCC, , , , , A1L4, );

--A1L17 is delay[1]~123
--operation mode is arithmetic

A1L17 = CARRY(!A1L15 # !delay[1]);


--delay[0] is delay[0]
--operation mode is arithmetic

delay[0]_lut_out = !delay[0];
delay[0] = DFFEAS(delay[0]_lut_out, clk, VCC, , , , , A1L4, );

--A1L15 is delay[0]~127
--operation mode is arithmetic

A1L15 = CARRY(delay[0]);


--delay[2] is delay[2]
--operation mode is arithmetic

delay[2]_carry_eqn = A1L17;
delay[2]_lut_out = delay[2] $ (!delay[2]_carry_eqn);
delay[2] = DFFEAS(delay[2]_lut_out, clk, VCC, , , , , A1L4, );

--A1L19 is delay[2]~131
--operation mode is arithmetic

A1L19 = CARRY(delay[2] & (!A1L17));


--A1L2 is LessThan~151
--operation mode is normal

A1L2 = delay[3] & (delay[1] # delay[0] # delay[2]);


--delay[4] is delay[4]
--operation mode is arithmetic

delay[4]_carry_eqn = A1L21;
delay[4]_lut_out = delay[4] $ (!delay[4]_carry_eqn);
delay[4] = DFFEAS(delay[4]_lut_out, clk, VCC, , , , , A1L4, );

--A1L23 is delay[4]~135
--operation mode is arithmetic

A1L23 = CARRY(delay[4] & (!A1L21));


--delay[5] is delay[5]
--operation mode is arithmetic

delay[5]_carry_eqn = A1L23;
delay[5]_lut_out = delay[5] $ (delay[5]_carry_eqn);
delay[5] = DFFEAS(delay[5]_lut_out, clk, VCC, , , , , A1L4, );

--A1L25 is delay[5]~139
--operation mode is arithmetic

A1L25 = CARRY(!A1L23 # !delay[5]);


--A1L3 is LessThan~152
--operation mode is normal

A1L3 = delay[4] # delay[5];


--A1L4 is LessThan~153
--operation mode is normal

A1L4 = delay[6] & delay[7] & (A1L2 # A1L3);


--clk is clk
--operation mode is input

clk = INPUT();


--led1 is led1
--operation mode is output

led1 = OUTPUT(led_out[1]);


--led2 is led2
--operation mode is output

led2 = OUTPUT(led_out[2]);


--led3 is led3
--operation mode is output

led3 = OUTPUT(led_out[3]);


--led4 is led4
--operation mode is output

led4 = OUTPUT(led_out[4]);


--led5 is led5
--operation mode is output

led5 = OUTPUT(led_out[5]);


--led6 is led6
--operation mode is output

led6 = OUTPUT(led_out[6]);


--seg_a is seg_a
--operation mode is output

seg_a = OUTPUT(A1L6);


--seg_b is seg_b
--operation mode is output

seg_b = OUTPUT(A1L8);


--seg_c is seg_c
--operation mode is output

seg_c = OUTPUT(A1L10);


--seg_d is seg_d
--operation mode is output

seg_d = OUTPUT(A1L43);


--seg_e is seg_e
--operation mode is output

seg_e = OUTPUT(VCC);


--seg_f is seg_f
--operation mode is output

seg_f = OUTPUT(!A1L11);


--seg_g is seg_g
--operation mode is output

seg_g = OUTPUT(!A1L1);


--seg_h is seg_h
--operation mode is output

seg_h = OUTPUT(GND);